1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * Copyright (C) 2023 Nuvoton Ltd. 5*91f16700Schasinglulu * 6*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 7*91f16700Schasinglulu */ 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <assert.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <arch_helpers.h> 12*91f16700Schasinglulu #include <lib/psci/psci.h> 13*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 14*91f16700Schasinglulu #include <plat/common/platform.h> 15*91f16700Schasinglulu #include <platform_def.h> 16*91f16700Schasinglulu 17*91f16700Schasinglulu 18*91f16700Schasinglulu /* Allow npcm845x to override these functions */ 19*91f16700Schasinglulu #pragma weak plat_arm_program_trusted_mailbox 20*91f16700Schasinglulu #pragma weak plat_setup_psci_ops /* changed to weak */ 21*91f16700Schasinglulu 22*91f16700Schasinglulu 23*91f16700Schasinglulu /******************************************************************************* 24*91f16700Schasinglulu * ARM standard platform handler called to check the validity of the non secure 25*91f16700Schasinglulu * entrypoint. Returns 0 if the entrypoint is valid, or -1 otherwise. 26*91f16700Schasinglulu ******************************************************************************/ 27*91f16700Schasinglulu int arm_validate_ns_entrypoint(uintptr_t entrypoint) 28*91f16700Schasinglulu { 29*91f16700Schasinglulu /* 30*91f16700Schasinglulu * Check if the non secure entrypoint lies within the non 31*91f16700Schasinglulu * secure DRAM. 32*91f16700Schasinglulu */ 33*91f16700Schasinglulu if ((entrypoint >= ARM_NS_DRAM1_BASE) && 34*91f16700Schasinglulu (entrypoint < (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE))) { 35*91f16700Schasinglulu return 0; 36*91f16700Schasinglulu } 37*91f16700Schasinglulu #ifdef __aarch64__ 38*91f16700Schasinglulu if ((entrypoint >= ARM_DRAM2_BASE) && 39*91f16700Schasinglulu (entrypoint < (ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) { 40*91f16700Schasinglulu return 0; 41*91f16700Schasinglulu } 42*91f16700Schasinglulu #endif 43*91f16700Schasinglulu 44*91f16700Schasinglulu return -1; 45*91f16700Schasinglulu } 46*91f16700Schasinglulu 47*91f16700Schasinglulu int arm_validate_psci_entrypoint(uintptr_t entrypoint) 48*91f16700Schasinglulu { 49*91f16700Schasinglulu return (arm_validate_ns_entrypoint(entrypoint) == 0) ? PSCI_E_SUCCESS : 50*91f16700Schasinglulu PSCI_E_INVALID_ADDRESS; 51*91f16700Schasinglulu } 52*91f16700Schasinglulu 53*91f16700Schasinglulu /****************************************************************************** 54*91f16700Schasinglulu * Helper function to save the platform state before a system suspend. Save the 55*91f16700Schasinglulu * state of the system components which are not in the Always ON power domain. 56*91f16700Schasinglulu *****************************************************************************/ 57*91f16700Schasinglulu void arm_system_pwr_domain_save(void) 58*91f16700Schasinglulu { 59*91f16700Schasinglulu /* Assert system power domain is available on the platform */ 60*91f16700Schasinglulu assert(PLAT_MAX_PWR_LVL > ARM_PWR_LVL1); 61*91f16700Schasinglulu 62*91f16700Schasinglulu plat_arm_gic_save(); 63*91f16700Schasinglulu 64*91f16700Schasinglulu /* 65*91f16700Schasinglulu * Unregister console now so that it is not registered for a second 66*91f16700Schasinglulu * time during resume. 67*91f16700Schasinglulu */ 68*91f16700Schasinglulu arm_console_runtime_end(); 69*91f16700Schasinglulu 70*91f16700Schasinglulu /* 71*91f16700Schasinglulu * All the other peripheral which are configured by TF-A are 72*91f16700Schasinglulu * re-initialized on resume from system suspend. Hence we 73*91f16700Schasinglulu * don't save their state here. 74*91f16700Schasinglulu */ 75*91f16700Schasinglulu } 76