xref: /arm-trusted-firmware/plat/mediatek/mt8195/drivers/pmic/pmic_wrap_init.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef PMIC_WRAP_INIT_H
8*91f16700Schasinglulu #define PMIC_WRAP_INIT_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <stdint.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #include "platform_def.h"
13*91f16700Schasinglulu #include <pmic_wrap_init_common.h>
14*91f16700Schasinglulu 
15*91f16700Schasinglulu static struct mt8195_pmic_wrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE;
16*91f16700Schasinglulu 
17*91f16700Schasinglulu /* PMIC_WRAP registers */
18*91f16700Schasinglulu struct mt8195_pmic_wrap_regs {
19*91f16700Schasinglulu 	uint32_t init_done;
20*91f16700Schasinglulu 	uint32_t reserved[543];
21*91f16700Schasinglulu 	uint32_t wacs2_cmd;
22*91f16700Schasinglulu 	uint32_t wacs2_wdata;
23*91f16700Schasinglulu 	uint32_t reserved1[3];
24*91f16700Schasinglulu 	uint32_t wacs2_rdata;
25*91f16700Schasinglulu 	uint32_t reserved2[3];
26*91f16700Schasinglulu 	uint32_t wacs2_vldclr;
27*91f16700Schasinglulu 	uint32_t wacs2_sta;
28*91f16700Schasinglulu };
29*91f16700Schasinglulu 
30*91f16700Schasinglulu #endif /* PMIC_WRAP_INIT_H */
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