1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2021, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu /* System Includes */ 8*91f16700Schasinglulu #include <assert.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu /* Project Includes */ 11*91f16700Schasinglulu #include <common/bl_common.h> 12*91f16700Schasinglulu #include <common/debug.h> 13*91f16700Schasinglulu #include <common/desc_image_load.h> 14*91f16700Schasinglulu #include <drivers/generic_delay_timer.h> 15*91f16700Schasinglulu #include <drivers/ti/uart/uart_16550.h> 16*91f16700Schasinglulu #include <lib/coreboot.h> 17*91f16700Schasinglulu 18*91f16700Schasinglulu /* Platform Includes */ 19*91f16700Schasinglulu #include <emi_mpu.h> 20*91f16700Schasinglulu #include <mt_gic_v3.h> 21*91f16700Schasinglulu #include <mt_spm.h> 22*91f16700Schasinglulu #include <mt_timer.h> 23*91f16700Schasinglulu #include <mtk_dcm.h> 24*91f16700Schasinglulu #include <mtgpio.h> 25*91f16700Schasinglulu #include <plat_params.h> 26*91f16700Schasinglulu #include <plat_private.h> 27*91f16700Schasinglulu 28*91f16700Schasinglulu static entry_point_info_t bl32_ep_info; 29*91f16700Schasinglulu static entry_point_info_t bl33_ep_info; 30*91f16700Schasinglulu 31*91f16700Schasinglulu /******************************************************************************* 32*91f16700Schasinglulu * Return a pointer to the 'entry_point_info' structure of the next image for 33*91f16700Schasinglulu * the security state specified. BL33 corresponds to the non-secure image type 34*91f16700Schasinglulu * while BL32 corresponds to the secure image type. A NULL pointer is returned 35*91f16700Schasinglulu * if the image does not exist. 36*91f16700Schasinglulu ******************************************************************************/ 37*91f16700Schasinglulu entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 38*91f16700Schasinglulu { 39*91f16700Schasinglulu entry_point_info_t *next_image_info; 40*91f16700Schasinglulu 41*91f16700Schasinglulu next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; 42*91f16700Schasinglulu assert(next_image_info->h.type == PARAM_EP); 43*91f16700Schasinglulu 44*91f16700Schasinglulu /* None of the images on this platform can have 0x0 as the entrypoint */ 45*91f16700Schasinglulu if (next_image_info->pc) { 46*91f16700Schasinglulu return next_image_info; 47*91f16700Schasinglulu } else { 48*91f16700Schasinglulu return NULL; 49*91f16700Schasinglulu } 50*91f16700Schasinglulu } 51*91f16700Schasinglulu 52*91f16700Schasinglulu /******************************************************************************* 53*91f16700Schasinglulu * Perform any BL31 early platform setup. Here is an opportunity to copy 54*91f16700Schasinglulu * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they 55*91f16700Schasinglulu * are lost (potentially). This needs to be done before the MMU is initialized 56*91f16700Schasinglulu * so that the memory layout can be used while creating page tables. 57*91f16700Schasinglulu * BL2 has flushed this information to memory, so we are guaranteed to pick up 58*91f16700Schasinglulu * good data. 59*91f16700Schasinglulu ******************************************************************************/ 60*91f16700Schasinglulu void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 61*91f16700Schasinglulu u_register_t arg2, u_register_t arg3) 62*91f16700Schasinglulu { 63*91f16700Schasinglulu static console_t console; 64*91f16700Schasinglulu 65*91f16700Schasinglulu params_early_setup(arg1); 66*91f16700Schasinglulu 67*91f16700Schasinglulu #if COREBOOT 68*91f16700Schasinglulu if (coreboot_serial.type) { 69*91f16700Schasinglulu console_16550_register(coreboot_serial.baseaddr, 70*91f16700Schasinglulu coreboot_serial.input_hertz, 71*91f16700Schasinglulu coreboot_serial.baud, 72*91f16700Schasinglulu &console); 73*91f16700Schasinglulu } 74*91f16700Schasinglulu #else 75*91f16700Schasinglulu console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); 76*91f16700Schasinglulu #endif 77*91f16700Schasinglulu 78*91f16700Schasinglulu NOTICE("MT8195 bl31_setup\n"); 79*91f16700Schasinglulu 80*91f16700Schasinglulu bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); 81*91f16700Schasinglulu } 82*91f16700Schasinglulu 83*91f16700Schasinglulu 84*91f16700Schasinglulu /******************************************************************************* 85*91f16700Schasinglulu * Perform any BL31 platform setup code 86*91f16700Schasinglulu ******************************************************************************/ 87*91f16700Schasinglulu void bl31_platform_setup(void) 88*91f16700Schasinglulu { 89*91f16700Schasinglulu /* Set dcm on */ 90*91f16700Schasinglulu if (!dcm_set_default()) { 91*91f16700Schasinglulu ERROR("Failed to set default dcm on!!\n"); 92*91f16700Schasinglulu } 93*91f16700Schasinglulu 94*91f16700Schasinglulu /* Initialize EMI MPU */ 95*91f16700Schasinglulu emi_mpu_init(); 96*91f16700Schasinglulu 97*91f16700Schasinglulu /* Initialize the GIC driver, CPU and distributor interfaces */ 98*91f16700Schasinglulu mt_gic_driver_init(); 99*91f16700Schasinglulu mt_gic_init(); 100*91f16700Schasinglulu 101*91f16700Schasinglulu mt_gpio_init(); 102*91f16700Schasinglulu mt_systimer_init(); 103*91f16700Schasinglulu generic_delay_timer_init(); 104*91f16700Schasinglulu spm_boot_init(); 105*91f16700Schasinglulu } 106*91f16700Schasinglulu 107*91f16700Schasinglulu /******************************************************************************* 108*91f16700Schasinglulu * Perform the very early platform specific architectural setup here. At the 109*91f16700Schasinglulu * moment this is only initializes the mmu in a quick and dirty way. 110*91f16700Schasinglulu ******************************************************************************/ 111*91f16700Schasinglulu void bl31_plat_arch_setup(void) 112*91f16700Schasinglulu { 113*91f16700Schasinglulu plat_configure_mmu_el3(BL31_START, 114*91f16700Schasinglulu BL31_END - BL31_START, 115*91f16700Schasinglulu BL_CODE_BASE, 116*91f16700Schasinglulu BL_CODE_END); 117*91f16700Schasinglulu } 118