1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2020, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef PLAT_MTK_LPM_H 8*91f16700Schasinglulu #define PLAT_MTK_LPM_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <lib/psci/psci.h> 11*91f16700Schasinglulu #include <lib/utils_def.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define MT_IRQ_REMAIN_MAX U(32) 14*91f16700Schasinglulu #define MT_IRQ_REMAIN_CAT_LOG BIT(31) 15*91f16700Schasinglulu 16*91f16700Schasinglulu struct mt_irqremain { 17*91f16700Schasinglulu unsigned int count; 18*91f16700Schasinglulu unsigned int irqs[MT_IRQ_REMAIN_MAX]; 19*91f16700Schasinglulu unsigned int wakeupsrc_cat[MT_IRQ_REMAIN_MAX]; 20*91f16700Schasinglulu unsigned int wakeupsrc[MT_IRQ_REMAIN_MAX]; 21*91f16700Schasinglulu }; 22*91f16700Schasinglulu 23*91f16700Schasinglulu #define PLAT_RC_STATUS_READY BIT(0) 24*91f16700Schasinglulu #define PLAT_RC_STATUS_FEATURE_EN BIT(1) 25*91f16700Schasinglulu #define PLAT_RC_STATUS_UART_NONSLEEP BIT(31) 26*91f16700Schasinglulu 27*91f16700Schasinglulu struct mt_lpm_tz { 28*91f16700Schasinglulu int (*pwr_prompt)(unsigned int cpu, const psci_power_state_t *state); 29*91f16700Schasinglulu int (*pwr_reflect)(unsigned int cpu, const psci_power_state_t *state); 30*91f16700Schasinglulu 31*91f16700Schasinglulu int (*pwr_cpu_on)(unsigned int cpu, const psci_power_state_t *state); 32*91f16700Schasinglulu int (*pwr_cpu_dwn)(unsigned int cpu, const psci_power_state_t *state); 33*91f16700Schasinglulu 34*91f16700Schasinglulu int (*pwr_cluster_on)(unsigned int cpu, 35*91f16700Schasinglulu const psci_power_state_t *state); 36*91f16700Schasinglulu int (*pwr_cluster_dwn)(unsigned int cpu, 37*91f16700Schasinglulu const psci_power_state_t *state); 38*91f16700Schasinglulu 39*91f16700Schasinglulu int (*pwr_mcusys_on)(unsigned int cpu, const psci_power_state_t *state); 40*91f16700Schasinglulu int (*pwr_mcusys_on_finished)(unsigned int cpu, 41*91f16700Schasinglulu const psci_power_state_t *state); 42*91f16700Schasinglulu int (*pwr_mcusys_dwn)(unsigned int cpu, 43*91f16700Schasinglulu const psci_power_state_t *state); 44*91f16700Schasinglulu }; 45*91f16700Schasinglulu 46*91f16700Schasinglulu const struct mt_lpm_tz *mt_plat_cpu_pm_init(void); 47*91f16700Schasinglulu 48*91f16700Schasinglulu #endif /* PLAT_MTK_LPM_H */ 49