1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu#ifndef PLAT_MACROS_S 7*91f16700Schasinglulu#define PLAT_MACROS_S 8*91f16700Schasinglulu 9*91f16700Schasinglulu#include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu.section .rodata.gic_reg_name, "aS" 12*91f16700Schasinglulugicc_regs: 13*91f16700Schasinglulu .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" 14*91f16700Schasinglulugicd_pend_reg: 15*91f16700Schasinglulu .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \ 16*91f16700Schasinglulu " Offset:\t\t\tvalue\n" 17*91f16700Schasinglulunewline: 18*91f16700Schasinglulu .asciz "\n" 19*91f16700Schasingluluspacer: 20*91f16700Schasinglulu .asciz ":\t\t0x" 21*91f16700Schasinglulu 22*91f16700Schasinglulu.section .rodata.cci_reg_name, "aS" 23*91f16700Schasinglulucci_iface_regs: 24*91f16700Schasinglulu .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" 25*91f16700Schasinglulu 26*91f16700Schasinglulu /* --------------------------------------------- 27*91f16700Schasinglulu * The below macro prints out relevant GIC 28*91f16700Schasinglulu * registers whenever an unhandled exception 29*91f16700Schasinglulu * is taken in BL31. 30*91f16700Schasinglulu * Clobbers: x0 - x10, x26, x27, sp 31*91f16700Schasinglulu * --------------------------------------------- 32*91f16700Schasinglulu */ 33*91f16700Schasinglulu .macro plat_crash_print_regs 34*91f16700Schasinglulu /* To-do: GIC owner */ 35*91f16700Schasinglulu /* To-do: CCI owner */ 36*91f16700Schasinglulu .endm 37*91f16700Schasinglulu 38*91f16700Schasinglulu#endif /* PLAT_MACROS_S */ 39