1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2020, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef MT_SPM_SSPM_INTC_H 8*91f16700Schasinglulu #define MT_SPM_SSPM_INTC_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <mt_spm_reg.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define MT_SPM_SSPM_INTC_SEL_0 0x10 13*91f16700Schasinglulu #define MT_SPM_SSPM_INTC_SEL_1 0x20 14*91f16700Schasinglulu #define MT_SPM_SSPM_INTC_SEL_2 0x40 15*91f16700Schasinglulu #define MT_SPM_SSPM_INTC_SEL_3 0x80 16*91f16700Schasinglulu 17*91f16700Schasinglulu #define MT_SPM_SSPM_INTC_TRIGGER(id, sg) \ 18*91f16700Schasinglulu (((0x10 << id) | (sg << id)) & 0xff) 19*91f16700Schasinglulu 20*91f16700Schasinglulu #define MT_SPM_SSPM_INTC0_HIGH MT_SPM_SSPM_INTC_TRIGGER(0, 1) 21*91f16700Schasinglulu #define MT_SPM_SSPM_INTC0_LOW MT_SPM_SSPM_INTC_TRIGGER(0, 0) 22*91f16700Schasinglulu #define MT_SPM_SSPM_INTC1_HIGH MT_SPM_SSPM_INTC_TRIGGER(1, 1) 23*91f16700Schasinglulu #define MT_SPM_SSPM_INTC1_LOW MT_SPM_SSPM_INTC_TRIGGER(1, 0) 24*91f16700Schasinglulu #define MT_SPM_SSPM_INTC2_HIGH MT_SPM_SSPM_INTC_TRIGGER(2, 1) 25*91f16700Schasinglulu #define MT_SPM_SSPM_INTC2_LOW MT_SPM_SSPM_INTC_TRIGGER(2, 0) 26*91f16700Schasinglulu #define MT_SPM_SSPM_INTC3_HIGH MT_SPM_SSPM_INTC_TRIGGER(3, 1) 27*91f16700Schasinglulu #define MT_SPM_SSPM_INTC3_LOW MT_SPM_SSPM_INTC_TRIGGER(3, 0) 28*91f16700Schasinglulu 29*91f16700Schasinglulu #define DO_SPM_SSPM_LP_SUSPEND() \ 30*91f16700Schasinglulu mmio_write_32(SPM_MD32_IRQ, MT_SPM_SSPM_INTC0_HIGH) 31*91f16700Schasinglulu #define DO_SPM_SSPM_LP_RESUME() \ 32*91f16700Schasinglulu mmio_write_32(SPM_MD32_IRQ, MT_SPM_SSPM_INTC0_LOW) 33*91f16700Schasinglulu #endif /* MT_SPM_SSPM_INTC_H */ 34