xref: /arm-trusted-firmware/plat/mediatek/mt8192/drivers/spm/constraints/mt_spm_rc_internal.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef MT_SPM_RC_INTERNAL_H
8*91f16700Schasinglulu #define MT_SPM_RC_INTERNAL_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <stdbool.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #define SPM_FLAG_SRAM_SLEEP_CTRL			\
13*91f16700Schasinglulu 	(SPM_FLAG_DISABLE_SSPM_SRAM_SLEEP |		\
14*91f16700Schasinglulu 	 SPM_FLAG_DISABLE_DRAMC_MCU_SRAM_SLEEP |	\
15*91f16700Schasinglulu 	 SPM_FLAG_DISABLE_SYSRAM_SLEEP |		\
16*91f16700Schasinglulu 	 SPM_FLAG_DISABLE_MCUPM_SRAM_SLEEP |		\
17*91f16700Schasinglulu 	 SPM_FLAG_DISABLE_SRAM_EVENT)
18*91f16700Schasinglulu 
19*91f16700Schasinglulu /* cpu buck/ldo constraint function */
20*91f16700Schasinglulu bool spm_is_valid_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
21*91f16700Schasinglulu unsigned int spm_allow_rc_cpu_buck_ldo(int state_id);
22*91f16700Schasinglulu int spm_run_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
23*91f16700Schasinglulu int spm_reset_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
24*91f16700Schasinglulu 
25*91f16700Schasinglulu /* spm resource dram constraint function */
26*91f16700Schasinglulu bool spm_is_valid_rc_dram(unsigned int cpu, int state_id);
27*91f16700Schasinglulu int spm_update_rc_dram(int state_id, int type, const void *val);
28*91f16700Schasinglulu unsigned int spm_allow_rc_dram(int state_id);
29*91f16700Schasinglulu int spm_run_rc_dram(unsigned int cpu, int state_id);
30*91f16700Schasinglulu int spm_reset_rc_dram(unsigned int cpu, int state_id);
31*91f16700Schasinglulu 
32*91f16700Schasinglulu /* spm resource syspll constraint function */
33*91f16700Schasinglulu bool spm_is_valid_rc_syspll(unsigned int cpu, int state_id);
34*91f16700Schasinglulu int spm_update_rc_syspll(int state_id, int type, const void *val);
35*91f16700Schasinglulu unsigned int spm_allow_rc_syspll(int state_id);
36*91f16700Schasinglulu int spm_run_rc_syspll(unsigned int cpu, int state_id);
37*91f16700Schasinglulu int spm_reset_rc_syspll(unsigned int cpu, int state_id);
38*91f16700Schasinglulu 
39*91f16700Schasinglulu /* spm resource bus26m constraint function */
40*91f16700Schasinglulu bool spm_is_valid_rc_bus26m(unsigned int cpu, int state_id);
41*91f16700Schasinglulu int spm_update_rc_bus26m(int state_id, int type, const void *val);
42*91f16700Schasinglulu unsigned int spm_allow_rc_bus26m(int state_id);
43*91f16700Schasinglulu int spm_run_rc_bus26m(unsigned int cpu, int state_id);
44*91f16700Schasinglulu int spm_reset_rc_bus26m(unsigned int cpu, int state_id);
45*91f16700Schasinglulu #endif /* MT_SPM_RC_INTERNAL_H */
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