1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2020, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef MTK_PTP3_H 8*91f16700Schasinglulu #define MTK_PTP3_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <lib/mmio.h> 11*91f16700Schasinglulu #include <lib/utils_def.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu /************************************************ 14*91f16700Schasinglulu * BIT Operation and REG r/w 15*91f16700Schasinglulu ************************************************/ 16*91f16700Schasinglulu #define ptp3_read(addr) mmio_read_32((uintptr_t)addr) 17*91f16700Schasinglulu #define ptp3_write(addr, val) mmio_write_32((uintptr_t)addr, val) 18*91f16700Schasinglulu 19*91f16700Schasinglulu /************************************************ 20*91f16700Schasinglulu * CPU info 21*91f16700Schasinglulu ************************************************/ 22*91f16700Schasinglulu #define NR_PTP3_CFG1_CPU U(8) 23*91f16700Schasinglulu #define PTP3_CFG1_CPU_START_ID U(0) 24*91f16700Schasinglulu #define PTP3_CFG1_MASK 0x00100000 25*91f16700Schasinglulu 26*91f16700Schasinglulu #define NR_PTP3_CFG2_CPU U(4) 27*91f16700Schasinglulu #define PTP3_CFG2_CPU_START_ID U(4) 28*91f16700Schasinglulu 29*91f16700Schasinglulu #define NR_PTP3_CFG3_CPU U(4) 30*91f16700Schasinglulu #define PTP3_CFG3_CPU_START_ID U(4) 31*91f16700Schasinglulu 32*91f16700Schasinglulu /************************************************ 33*91f16700Schasinglulu * config enum 34*91f16700Schasinglulu ************************************************/ 35*91f16700Schasinglulu enum PTP3_CFG { 36*91f16700Schasinglulu PTP3_CFG_ADDR, 37*91f16700Schasinglulu PTP3_CFG_VALUE, 38*91f16700Schasinglulu NR_PTP3_CFG, 39*91f16700Schasinglulu }; 40*91f16700Schasinglulu 41*91f16700Schasinglulu /************************************ 42*91f16700Schasinglulu * prototype 43*91f16700Schasinglulu ************************************/ 44*91f16700Schasinglulu /* init trigger for ptp3 feature */ 45*91f16700Schasinglulu extern void ptp3_init(unsigned int core); 46*91f16700Schasinglulu extern void ptp3_deinit(unsigned int core); 47*91f16700Schasinglulu 48*91f16700Schasinglulu #endif /* MTK_PTP3_H */ 49