1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <arch.h> 8*91f16700Schasinglulu #include <arch_helpers.h> 9*91f16700Schasinglulu #include <lib/psci/psci.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <plat_helpers.h> 12*91f16700Schasinglulu #include <platform_def.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu const unsigned char mtk_power_domain_tree_desc[] = { 15*91f16700Schasinglulu /* Number of root nodes */ 16*91f16700Schasinglulu PLATFORM_SYSTEM_COUNT, 17*91f16700Schasinglulu /* Number of children for the root node */ 18*91f16700Schasinglulu PLATFORM_MCUSYS_COUNT, 19*91f16700Schasinglulu /* Number of children for the mcusys node */ 20*91f16700Schasinglulu PLATFORM_CLUSTER_COUNT, 21*91f16700Schasinglulu /* Number of children for the first cluster node */ 22*91f16700Schasinglulu PLATFORM_CLUSTER0_CORE_COUNT, 23*91f16700Schasinglulu }; 24*91f16700Schasinglulu 25*91f16700Schasinglulu const unsigned char *plat_get_power_domain_tree_desc(void) 26*91f16700Schasinglulu { 27*91f16700Schasinglulu return mtk_power_domain_tree_desc; 28*91f16700Schasinglulu } 29*91f16700Schasinglulu 30*91f16700Schasinglulu /******************************************************************************* 31*91f16700Schasinglulu * This function implements a part of the critical interface between the psci 32*91f16700Schasinglulu * generic layer and the platform that allows the former to query the platform 33*91f16700Schasinglulu * to convert an MPIDR to a unique linear index. An error code (-1) is returned 34*91f16700Schasinglulu * in case the MPIDR is invalid. 35*91f16700Schasinglulu ******************************************************************************/ 36*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr) 37*91f16700Schasinglulu { 38*91f16700Schasinglulu unsigned int cluster_id, cpu_id; 39*91f16700Schasinglulu 40*91f16700Schasinglulu if ((read_mpidr() & MPIDR_MT_MASK) != 0) { 41*91f16700Schasinglulu /* ARMv8.2 arch */ 42*91f16700Schasinglulu if ((mpidr & (MPIDR_AFFLVL_MASK << MPIDR_AFF0_SHIFT)) != 0) { 43*91f16700Schasinglulu return -1; 44*91f16700Schasinglulu } 45*91f16700Schasinglulu return plat_mediatek_calc_core_pos(mpidr); 46*91f16700Schasinglulu } 47*91f16700Schasinglulu 48*91f16700Schasinglulu mpidr &= MPIDR_AFFINITY_MASK; 49*91f16700Schasinglulu 50*91f16700Schasinglulu if ((mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0) { 51*91f16700Schasinglulu return -1; 52*91f16700Schasinglulu } 53*91f16700Schasinglulu 54*91f16700Schasinglulu cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 55*91f16700Schasinglulu cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 56*91f16700Schasinglulu 57*91f16700Schasinglulu if (cluster_id >= PLATFORM_CLUSTER_COUNT) { 58*91f16700Schasinglulu return -1; 59*91f16700Schasinglulu } 60*91f16700Schasinglulu 61*91f16700Schasinglulu /* 62*91f16700Schasinglulu * Validate cpu_id by checking whether it represents a CPU in 63*91f16700Schasinglulu * one of the two clusters present on the platform. 64*91f16700Schasinglulu */ 65*91f16700Schasinglulu if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { 66*91f16700Schasinglulu return -1; 67*91f16700Schasinglulu } 68*91f16700Schasinglulu 69*91f16700Schasinglulu return (cpu_id + (cluster_id * 8)); 70*91f16700Schasinglulu } 71