1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) since 2022, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <common/debug.h> 8*91f16700Schasinglulu #include <lib/mmio.h> 9*91f16700Schasinglulu #include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #define INFRA_AO_RES_CTRL_MASK (INFRACFG_AO_BASE + 0xB8) 12*91f16700Schasinglulu #define INFRA_AO_RES_CTRL_MASK_EMI_IDLE BIT(18) 13*91f16700Schasinglulu #define INFRA_AO_RES_CTRL_MASK_MPU_IDLE BIT(15) 14*91f16700Schasinglulu 15*91f16700Schasinglulu void spm_extern_initialize(void) 16*91f16700Schasinglulu { 17*91f16700Schasinglulu unsigned int val; 18*91f16700Schasinglulu 19*91f16700Schasinglulu val = mmio_read_32(INFRA_AO_RES_CTRL_MASK); 20*91f16700Schasinglulu 21*91f16700Schasinglulu val |= (INFRA_AO_RES_CTRL_MASK_EMI_IDLE | INFRA_AO_RES_CTRL_MASK_MPU_IDLE); 22*91f16700Schasinglulu mmio_write_32(INFRA_AO_RES_CTRL_MASK, val); 23*91f16700Schasinglulu } 24