1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2022, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef MT_SPM_H 8*91f16700Schasinglulu #define MT_SPM_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <lib/bakery_lock.h> 11*91f16700Schasinglulu #include <lib/spinlock.h> 12*91f16700Schasinglulu #include <plat_mtk_lpm.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu /* 15*91f16700Schasinglulu * ARM v8.2, the cache will turn off automatically when cpu 16*91f16700Schasinglulu * power down. Therefore, there is no doubt to use the spin_lock here. 17*91f16700Schasinglulu */ 18*91f16700Schasinglulu #if !HW_ASSISTED_COHERENCY 19*91f16700Schasinglulu #define MT_SPM_USING_BAKERY_LOCK 20*91f16700Schasinglulu #endif 21*91f16700Schasinglulu 22*91f16700Schasinglulu #ifdef MT_SPM_USING_BAKERY_LOCK 23*91f16700Schasinglulu DECLARE_BAKERY_LOCK(spm_lock); 24*91f16700Schasinglulu #define plat_spm_lock() bakery_lock_get(&spm_lock) 25*91f16700Schasinglulu #define plat_spm_unlock() bakery_lock_release(&spm_lock) 26*91f16700Schasinglulu #else 27*91f16700Schasinglulu extern spinlock_t spm_lock; 28*91f16700Schasinglulu #define plat_spm_lock() spin_lock(&spm_lock) 29*91f16700Schasinglulu #define plat_spm_unlock() spin_unlock(&spm_lock) 30*91f16700Schasinglulu #endif 31*91f16700Schasinglulu 32*91f16700Schasinglulu #define MT_SPM_USING_SRCLKEN_RC 33*91f16700Schasinglulu 34*91f16700Schasinglulu /* spm extern operand definition */ 35*91f16700Schasinglulu #define MT_SPM_EX_OP_CLR_26M_RECORD BIT(0) 36*91f16700Schasinglulu #define MT_SPM_EX_OP_SET_WDT BIT(1) 37*91f16700Schasinglulu #define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ BIT(2) 38*91f16700Schasinglulu #define MT_SPM_EX_OP_SET_SUSPEND_MODE BIT(3) 39*91f16700Schasinglulu #define MT_SPM_EX_OP_SET_IS_ADSP BIT(4) 40*91f16700Schasinglulu #define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM BIT(5) 41*91f16700Schasinglulu #define MT_SPM_EX_OP_HW_S1_DETECT BIT(6) 42*91f16700Schasinglulu #define MT_SPM_EX_OP_TRACE_LP BIT(7) 43*91f16700Schasinglulu #define MT_SPM_EX_OP_TRACE_SUSPEND BIT(8) 44*91f16700Schasinglulu #define MT_SPM_EX_OP_TRACE_TIMESTAMP_EN BIT(9) 45*91f16700Schasinglulu #define MT_SPM_EX_OP_TIME_CHECK BIT(10) 46*91f16700Schasinglulu #define MT_SPM_EX_OP_TIME_OBS BIT(11) 47*91f16700Schasinglulu 48*91f16700Schasinglulu typedef enum { 49*91f16700Schasinglulu WR_NONE = 0, 50*91f16700Schasinglulu WR_UART_BUSY = 1, 51*91f16700Schasinglulu WR_ABORT = 2, 52*91f16700Schasinglulu WR_PCM_TIMER = 3, 53*91f16700Schasinglulu WR_WAKE_SRC = 4, 54*91f16700Schasinglulu WR_DVFSRC = 5, 55*91f16700Schasinglulu WR_TWAM = 6, 56*91f16700Schasinglulu WR_PMSR = 7, 57*91f16700Schasinglulu WR_SPM_ACK_CHK = 8, 58*91f16700Schasinglulu WR_UNKNOWN = 9, 59*91f16700Schasinglulu } wake_reason_t; 60*91f16700Schasinglulu 61*91f16700Schasinglulu /* for suspend vol. bin settings */ 62*91f16700Schasinglulu enum MT_PLAT_SUSPEND_VCORE { 63*91f16700Schasinglulu SPM_SUSPEND_VCORE_5500 = 0, 64*91f16700Schasinglulu SPM_SUSPEND_VCORE_5250 = 1, 65*91f16700Schasinglulu SPM_SUSPEND_VCORE_5000 = 2, 66*91f16700Schasinglulu }; 67*91f16700Schasinglulu 68*91f16700Schasinglulu extern void spm_boot_init(void); 69*91f16700Schasinglulu 70*91f16700Schasinglulu static inline void spm_lock_get(void) 71*91f16700Schasinglulu { 72*91f16700Schasinglulu plat_spm_lock(); 73*91f16700Schasinglulu } 74*91f16700Schasinglulu 75*91f16700Schasinglulu static inline void spm_lock_release(void) 76*91f16700Schasinglulu { 77*91f16700Schasinglulu plat_spm_unlock(); 78*91f16700Schasinglulu } 79*91f16700Schasinglulu 80*91f16700Schasinglulu unsigned int spm_get_suspend_vcore_voltage_idx(void); 81*91f16700Schasinglulu 82*91f16700Schasinglulu #endif /* MT_SPM_H */ 83