xref: /arm-trusted-firmware/plat/mediatek/mt8186/aarch64/platform_common.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_v2.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <platform_def.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu /* Table of regions to map using the MMU.  */
12*91f16700Schasinglulu const mmap_region_t plat_mmap[] = {
13*91f16700Schasinglulu 	/* for TF text, RO, RW */
14*91f16700Schasinglulu 	MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
15*91f16700Schasinglulu 			MT_DEVICE | MT_RW | MT_SECURE),
16*91f16700Schasinglulu 	MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
17*91f16700Schasinglulu 			MT_DEVICE | MT_RW | MT_SECURE),
18*91f16700Schasinglulu 	MAP_REGION_FLAT(MTK_MCDI_SRAM_BASE, MTK_MCDI_SRAM_MAP_SIZE,
19*91f16700Schasinglulu 			MT_DEVICE | MT_RW | MT_SECURE),
20*91f16700Schasinglulu 	{ 0 }
21*91f16700Schasinglulu };
22*91f16700Schasinglulu 
23*91f16700Schasinglulu /*******************************************************************************
24*91f16700Schasinglulu  * Macro generating the code for the function setting up the pagetables as per
25*91f16700Schasinglulu  * the platform memory map & initialize the mmu, for the given exception level
26*91f16700Schasinglulu  ******************************************************************************/
27*91f16700Schasinglulu void plat_configure_mmu_el3(uintptr_t total_base,
28*91f16700Schasinglulu 			    uintptr_t total_size,
29*91f16700Schasinglulu 			    uintptr_t ro_start,
30*91f16700Schasinglulu 			    uintptr_t ro_limit)
31*91f16700Schasinglulu {
32*91f16700Schasinglulu 	mmap_add_region(total_base, total_base, total_size,
33*91f16700Schasinglulu 			MT_RW_DATA | MT_SECURE);
34*91f16700Schasinglulu 	mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
35*91f16700Schasinglulu 			MT_CODE | MT_SECURE);
36*91f16700Schasinglulu 	mmap_add(plat_mmap);
37*91f16700Schasinglulu 	init_xlat_tables();
38*91f16700Schasinglulu 	enable_mmu_el3(0);
39*91f16700Schasinglulu }
40*91f16700Schasinglulu 
41*91f16700Schasinglulu unsigned int plat_get_syscnt_freq2(void)
42*91f16700Schasinglulu {
43*91f16700Schasinglulu 	return SYS_COUNTER_FREQ_IN_TICKS;
44*91f16700Schasinglulu }
45