1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <arch.h> 8*91f16700Schasinglulu #include <assert.h> 9*91f16700Schasinglulu #include <common/debug.h> 10*91f16700Schasinglulu #include <lib/mmio.h> 11*91f16700Schasinglulu #include <mcucfg.h> 12*91f16700Schasinglulu #include <stdio.h> 13*91f16700Schasinglulu #include <stdlib.h> 14*91f16700Schasinglulu #include <string.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu void disable_scu(u_register_t mpidr) 17*91f16700Schasinglulu { 18*91f16700Schasinglulu uintptr_t axi_config = 0; 19*91f16700Schasinglulu uint32_t axi_value; 20*91f16700Schasinglulu 21*91f16700Schasinglulu switch (mpidr & MPIDR_CLUSTER_MASK) { 22*91f16700Schasinglulu case 0x000: 23*91f16700Schasinglulu axi_config = (uintptr_t)&mt8183_mcucfg->mp0_axi_config; 24*91f16700Schasinglulu axi_value = MP0_ACINACTM; 25*91f16700Schasinglulu break; 26*91f16700Schasinglulu case 0x100: 27*91f16700Schasinglulu axi_config = (uintptr_t)&mt8183_mcucfg->mp2_axi_config; 28*91f16700Schasinglulu axi_value = MP2_ACINACTM; 29*91f16700Schasinglulu break; 30*91f16700Schasinglulu default: 31*91f16700Schasinglulu ERROR("%s: mpidr does not exist\n", __func__); 32*91f16700Schasinglulu panic(); 33*91f16700Schasinglulu } 34*91f16700Schasinglulu mmio_setbits_32(axi_config, axi_value); 35*91f16700Schasinglulu } 36*91f16700Schasinglulu 37*91f16700Schasinglulu void enable_scu(u_register_t mpidr) 38*91f16700Schasinglulu { 39*91f16700Schasinglulu uintptr_t axi_config = 0; 40*91f16700Schasinglulu uint32_t axi_value; 41*91f16700Schasinglulu 42*91f16700Schasinglulu switch (mpidr & MPIDR_CLUSTER_MASK) { 43*91f16700Schasinglulu case 0x000: 44*91f16700Schasinglulu axi_config = (uintptr_t)&mt8183_mcucfg->mp0_axi_config; 45*91f16700Schasinglulu axi_value = MP0_ACINACTM; 46*91f16700Schasinglulu break; 47*91f16700Schasinglulu case 0x100: 48*91f16700Schasinglulu axi_config = (uintptr_t)&mt8183_mcucfg->mp2_axi_config; 49*91f16700Schasinglulu axi_value = MP2_ACINACTM; 50*91f16700Schasinglulu break; 51*91f16700Schasinglulu default: 52*91f16700Schasinglulu ERROR("%s: mpidr does not exist\n", __func__); 53*91f16700Schasinglulu panic(); 54*91f16700Schasinglulu } 55*91f16700Schasinglulu mmio_clrbits_32(axi_config, axi_value); 56*91f16700Schasinglulu } 57