1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef PMIC_H 8*91f16700Schasinglulu #define PMIC_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu enum { 11*91f16700Schasinglulu PMIC_TMA_KEY = 0x03a8, 12*91f16700Schasinglulu PMIC_PWRHOLD = 0x0a08, 13*91f16700Schasinglulu PMIC_PSEQ_ELR11 = 0x0a62, 14*91f16700Schasinglulu PMIC_VPROC11_CON0 = 0x1388, 15*91f16700Schasinglulu PMIC_VPROC11_OP_EN = 0x1390, 16*91f16700Schasinglulu PMIC_VSRAM_PROC11_CON0 = 0x1b46, 17*91f16700Schasinglulu PMIC_VSRAM_PROC11_OP_EN = 0x1b4e 18*91f16700Schasinglulu }; 19*91f16700Schasinglulu 20*91f16700Schasinglulu enum { 21*91f16700Schasinglulu PMIC_RG_SDN_DLY_ENB = 1U << 10 22*91f16700Schasinglulu }; 23*91f16700Schasinglulu 24*91f16700Schasinglulu /* external API */ 25*91f16700Schasinglulu void bcpu_enable(uint32_t en); 26*91f16700Schasinglulu void bcpu_sram_enable(uint32_t en); 27*91f16700Schasinglulu void wk_pmic_enable_sdn_delay(void); 28*91f16700Schasinglulu void pmic_power_off(void); 29*91f16700Schasinglulu 30*91f16700Schasinglulu #endif /* PMIC_H */ 31