1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <arch_helpers.h> 8*91f16700Schasinglulu #include <common/bl_common.h> 9*91f16700Schasinglulu #include <common/debug.h> 10*91f16700Schasinglulu #include <mcsi/mcsi.h> 11*91f16700Schasinglulu #include <platform_def.h> 12*91f16700Schasinglulu #include <lib/utils.h> 13*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu static const int cci_map[] = { 16*91f16700Schasinglulu PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX, 17*91f16700Schasinglulu PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX 18*91f16700Schasinglulu }; 19*91f16700Schasinglulu 20*91f16700Schasinglulu /* Table of regions to map using the MMU. */ 21*91f16700Schasinglulu const mmap_region_t plat_mmap[] = { 22*91f16700Schasinglulu /* for TF text, RO, RW */ 23*91f16700Schasinglulu MAP_REGION_FLAT(TZRAM_BASE, TZRAM_SIZE, 24*91f16700Schasinglulu MT_MEMORY | MT_RW | MT_SECURE), 25*91f16700Schasinglulu MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE, 26*91f16700Schasinglulu MT_DEVICE | MT_RW | MT_SECURE), 27*91f16700Schasinglulu MAP_REGION_FLAT(MTK_DEV_RNG1_BASE, MTK_DEV_RNG1_SIZE, 28*91f16700Schasinglulu MT_DEVICE | MT_RW | MT_SECURE), 29*91f16700Schasinglulu MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE, 30*91f16700Schasinglulu MT_DEVICE | MT_RW | MT_SECURE), 31*91f16700Schasinglulu { 0 } 32*91f16700Schasinglulu }; 33*91f16700Schasinglulu 34*91f16700Schasinglulu /******************************************************************************* 35*91f16700Schasinglulu * Macro generating the code for the function setting up the pagetables as per 36*91f16700Schasinglulu * the platform memory map & initialize the mmu, for the given exception level 37*91f16700Schasinglulu ******************************************************************************/ 38*91f16700Schasinglulu void plat_configure_mmu_el3(uintptr_t total_base, 39*91f16700Schasinglulu uintptr_t total_size, 40*91f16700Schasinglulu uintptr_t ro_start, 41*91f16700Schasinglulu uintptr_t ro_limit, 42*91f16700Schasinglulu uintptr_t coh_start, 43*91f16700Schasinglulu uintptr_t coh_limit) 44*91f16700Schasinglulu { 45*91f16700Schasinglulu mmap_add_region(total_base, total_base, total_size, 46*91f16700Schasinglulu MT_MEMORY | MT_RW | MT_SECURE); 47*91f16700Schasinglulu mmap_add_region(ro_start, ro_start, ro_limit - ro_start, 48*91f16700Schasinglulu MT_MEMORY | MT_RO | MT_SECURE); 49*91f16700Schasinglulu mmap_add_region(coh_start, coh_start, coh_limit - coh_start, 50*91f16700Schasinglulu MT_DEVICE | MT_RW | MT_SECURE); 51*91f16700Schasinglulu mmap_add(plat_mmap); 52*91f16700Schasinglulu init_xlat_tables(); 53*91f16700Schasinglulu enable_mmu_el3(0); 54*91f16700Schasinglulu } 55*91f16700Schasinglulu 56*91f16700Schasinglulu unsigned int plat_get_syscnt_freq2(void) 57*91f16700Schasinglulu { 58*91f16700Schasinglulu return SYS_COUNTER_FREQ_IN_TICKS; 59*91f16700Schasinglulu } 60*91f16700Schasinglulu 61*91f16700Schasinglulu void plat_mtk_cci_init(void) 62*91f16700Schasinglulu { 63*91f16700Schasinglulu /* Initialize CCI driver */ 64*91f16700Schasinglulu mcsi_init(PLAT_MT_CCI_BASE, ARRAY_SIZE(cci_map)); 65*91f16700Schasinglulu } 66*91f16700Schasinglulu 67*91f16700Schasinglulu void plat_mtk_cci_enable(void) 68*91f16700Schasinglulu { 69*91f16700Schasinglulu /* Enable CCI coherency for this cluster. 70*91f16700Schasinglulu * No need for locks as no other cpu is active at the moment. 71*91f16700Schasinglulu */ 72*91f16700Schasinglulu cci_enable_cluster_coherency(read_mpidr()); 73*91f16700Schasinglulu } 74*91f16700Schasinglulu 75*91f16700Schasinglulu void plat_mtk_cci_disable(void) 76*91f16700Schasinglulu { 77*91f16700Schasinglulu cci_disable_cluster_coherency(read_mpidr()); 78*91f16700Schasinglulu } 79*91f16700Schasinglulu 80*91f16700Schasinglulu void plat_mtk_cci_init_sf(void) 81*91f16700Schasinglulu { 82*91f16700Schasinglulu /* Init mcsi snoop filter. */ 83*91f16700Schasinglulu cci_init_sf(); 84*91f16700Schasinglulu } 85