xref: /arm-trusted-firmware/plat/mediatek/mt8173/platform.mk (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu#
2*91f16700Schasinglulu# Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu#
4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu#
6*91f16700Schasinglulu
7*91f16700SchasingluluMTK_PLAT		:=	plat/mediatek
8*91f16700SchasingluluMTK_PLAT_SOC		:=	${MTK_PLAT}/${PLAT}
9*91f16700Schasinglulu
10*91f16700SchasingluluPLAT_INCLUDES		:=	-I${MTK_PLAT}/common/				\
11*91f16700Schasinglulu				-I${MTK_PLAT}/include/				\
12*91f16700Schasinglulu				-Iinclude/plat/arm/common/aarch64		\
13*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/drivers/crypt/		\
14*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/drivers/mtcmos/		\
15*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/drivers/pmic/			\
16*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/drivers/rtc/			\
17*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/drivers/spm/			\
18*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/drivers/timer/		\
19*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/drivers/wdt/			\
20*91f16700Schasinglulu				-I${MTK_PLAT_SOC}/include/
21*91f16700Schasinglulu
22*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c		\
23*91f16700Schasinglulu				lib/xlat_tables/aarch64/xlat_tables.c		\
24*91f16700Schasinglulu				plat/arm/common/arm_gicv2.c			\
25*91f16700Schasinglulu				plat/common/plat_gicv2.c			\
26*91f16700Schasinglulu				plat/common/aarch64/crash_console_helpers.S
27*91f16700Schasinglulu
28*91f16700SchasingluluBL31_SOURCES		+=	common/desc_image_load.c			\
29*91f16700Schasinglulu				drivers/arm/cci/cci.c				\
30*91f16700Schasinglulu				drivers/arm/gic/common/gic_common.c		\
31*91f16700Schasinglulu				drivers/arm/gic/v2/gicv2_main.c			\
32*91f16700Schasinglulu				drivers/arm/gic/v2/gicv2_helpers.c		\
33*91f16700Schasinglulu				drivers/delay_timer/delay_timer.c		\
34*91f16700Schasinglulu				drivers/delay_timer/generic_delay_timer.c	\
35*91f16700Schasinglulu				drivers/ti/uart/aarch64/16550_console.S		\
36*91f16700Schasinglulu				lib/cpus/aarch64/aem_generic.S			\
37*91f16700Schasinglulu				lib/cpus/aarch64/cortex_a53.S			\
38*91f16700Schasinglulu				lib/cpus/aarch64/cortex_a57.S			\
39*91f16700Schasinglulu				lib/cpus/aarch64/cortex_a72.S			\
40*91f16700Schasinglulu				${MTK_PLAT}/common/mtk_plat_common.c		\
41*91f16700Schasinglulu				${MTK_PLAT}/common/mtk_sip_svc.c		\
42*91f16700Schasinglulu				${MTK_PLAT}/drivers/pmic_wrap/pmic_wrap_init.c	\
43*91f16700Schasinglulu				${MTK_PLAT}/drivers/rtc/rtc_common.c		\
44*91f16700Schasinglulu				${MTK_PLAT_SOC}/aarch64/plat_helpers.S		\
45*91f16700Schasinglulu				${MTK_PLAT_SOC}/aarch64/platform_common.c	\
46*91f16700Schasinglulu				${MTK_PLAT_SOC}/bl31_plat_setup.c		\
47*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/crypt/crypt.c		\
48*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c		\
49*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/rtc/rtc.c		\
50*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/spm/spm.c		\
51*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c	\
52*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c		\
53*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c	\
54*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c	\
55*91f16700Schasinglulu				${MTK_PLAT_SOC}/drivers/wdt/wdt.c		\
56*91f16700Schasinglulu				${MTK_PLAT_SOC}/plat_pm.c			\
57*91f16700Schasinglulu				${MTK_PLAT_SOC}/plat_sip_calls.c		\
58*91f16700Schasinglulu				${MTK_PLAT_SOC}/plat_topology.c			\
59*91f16700Schasinglulu				${MTK_PLAT_SOC}/power_tracer.c			\
60*91f16700Schasinglulu				${MTK_PLAT_SOC}/scu.c
61*91f16700Schasinglulu
62*91f16700Schasinglulu# Enable workarounds for selected Cortex-A53 erratas.
63*91f16700SchasingluluERRATA_A53_826319	:=	1
64*91f16700SchasingluluERRATA_A53_836870	:=	1
65*91f16700SchasingluluERRATA_A53_855873	:=	1
66*91f16700Schasinglulu
67*91f16700Schasinglulu# indicate the reset vector address can be programmed
68*91f16700SchasingluluPROGRAMMABLE_RESET_ADDRESS	:=	1
69*91f16700Schasinglulu
70*91f16700Schasinglulu$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE))
71*91f16700Schasinglulu
72*91f16700Schasinglulu# Do not enable SVE
73*91f16700SchasingluluENABLE_SVE_FOR_NS		:=	0
74