1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <drivers/arm/cci.h> 8*91f16700Schasinglulu#include <drivers/arm/gic_common.h> 9*91f16700Schasinglulu#include <drivers/arm/gicv2.h> 10*91f16700Schasinglulu#include <mt8173_def.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu.section .rodata.gic_reg_name, "aS" 13*91f16700Schasinglulugicc_regs: 14*91f16700Schasinglulu .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" 15*91f16700Schasinglulugicd_pend_reg: 16*91f16700Schasinglulu .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \ 17*91f16700Schasinglulu " Offset:\t\t\tvalue\n" 18*91f16700Schasinglulunewline: 19*91f16700Schasinglulu .asciz "\n" 20*91f16700Schasingluluspacer: 21*91f16700Schasinglulu .asciz ":\t\t0x" 22*91f16700Schasinglulu 23*91f16700Schasinglulu.section .rodata.cci_reg_name, "aS" 24*91f16700Schasinglulucci_iface_regs: 25*91f16700Schasinglulu .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" 26*91f16700Schasinglulu 27*91f16700Schasinglulu /* --------------------------------------------- 28*91f16700Schasinglulu * The below macro prints out relevant GIC and 29*91f16700Schasinglulu * CCI registers whenever an unhandled exception 30*91f16700Schasinglulu * is taken in BL3-1. 31*91f16700Schasinglulu * Clobbers: x0 - x10, x16, x17, sp 32*91f16700Schasinglulu * --------------------------------------------- 33*91f16700Schasinglulu */ 34*91f16700Schasinglulu .macro plat_crash_print_regs 35*91f16700Schasinglulu mov_imm x16, BASE_GICD_BASE 36*91f16700Schasinglulu mov_imm x17, BASE_GICC_BASE 37*91f16700Schasinglulu /* Load the gicc reg list to x6 */ 38*91f16700Schasinglulu adr x6, gicc_regs 39*91f16700Schasinglulu /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ 40*91f16700Schasinglulu ldr w8, [x17, #GICC_HPPIR] 41*91f16700Schasinglulu ldr w9, [x17, #GICC_AHPPIR] 42*91f16700Schasinglulu ldr w10, [x17, #GICC_CTLR] 43*91f16700Schasinglulu /* Store to the crash buf and print to console */ 44*91f16700Schasinglulu bl str_in_crash_buf_print 45*91f16700Schasinglulu 46*91f16700Schasinglulu /* Print the GICD_ISPENDR regs */ 47*91f16700Schasinglulu add x7, x16, #GICD_ISPENDR 48*91f16700Schasinglulu adr x4, gicd_pend_reg 49*91f16700Schasinglulu bl asm_print_str 50*91f16700Schasinglulugicd_ispendr_loop: 51*91f16700Schasinglulu sub x4, x7, x16 52*91f16700Schasinglulu cmp x4, #0x280 53*91f16700Schasinglulu b.eq exit_print_gic_regs 54*91f16700Schasinglulu bl asm_print_hex 55*91f16700Schasinglulu 56*91f16700Schasinglulu adr x4, spacer 57*91f16700Schasinglulu bl asm_print_str 58*91f16700Schasinglulu 59*91f16700Schasinglulu ldr x4, [x7], #8 60*91f16700Schasinglulu bl asm_print_hex 61*91f16700Schasinglulu 62*91f16700Schasinglulu adr x4, newline 63*91f16700Schasinglulu bl asm_print_str 64*91f16700Schasinglulu b gicd_ispendr_loop 65*91f16700Schasingluluexit_print_gic_regs: 66*91f16700Schasinglulu 67*91f16700Schasinglulu adr x6, cci_iface_regs 68*91f16700Schasinglulu /* Store in x7 the base address of the first interface */ 69*91f16700Schasinglulu mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \ 70*91f16700Schasinglulu PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX)) 71*91f16700Schasinglulu ldr w8, [x7, #SNOOP_CTRL_REG] 72*91f16700Schasinglulu /* Store in x7 the base address of the second interface */ 73*91f16700Schasinglulu mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \ 74*91f16700Schasinglulu PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX)) 75*91f16700Schasinglulu ldr w9, [x7, #SNOOP_CTRL_REG] 76*91f16700Schasinglulu /* Store to the crash buf and print to console */ 77*91f16700Schasinglulu bl str_in_crash_buf_print 78*91f16700Schasinglulu .endm 79