xref: /arm-trusted-firmware/plat/mediatek/include/plat.ld.rodata.inc (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (c) 2022, MediaTek Inc. All rights reserved.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu */
6*91f16700Schasinglulu
7*91f16700Schasinglulu#ifndef PLAT_LD_RODATA_INC
8*91f16700Schasinglulu#define PLAT_LD_RODATA_INC
9*91f16700Schasinglulu
10*91f16700Schasinglulu#include <lib/mtk_init/mtk_init.h>
11*91f16700Schasinglulu	. = ALIGN(32);
12*91f16700Schasinglulu	INIT_CALL_TABLE(EXPAND_AS_LINK_SECTION);
13*91f16700Schasinglulu	__MTK_PLAT_INITCALL_END__ = .;
14*91f16700Schasinglulu	. = ALIGN(32);
15*91f16700Schasinglulu	__MTK_MMAP_POINTER_POOL_START__ = .;
16*91f16700Schasinglulu	KEEP(*(.mtk_mmap_pool))
17*91f16700Schasinglulu	__MTK_MMAP_POINTER_POOL_END_UNALIGNED__ = .;
18*91f16700Schasinglulu	. = ALIGN(8);
19*91f16700Schasinglulu	__MTK_MMAP_POOL_START__ = .;
20*91f16700Schasinglulu	KEEP(*(.mtk_mmap_lists))
21*91f16700Schasinglulu	__MTK_MMAP_POOL_END_UNALIGNED__ = .;
22*91f16700Schasinglulu	. = ALIGN(32);
23*91f16700Schasinglulu	__MTK_SMC_POOL_START__ = .;
24*91f16700Schasinglulu	KEEP(*(.mtk_smc_descriptor_pool))
25*91f16700Schasinglulu	__MTK_SMC_POOL_END_UNALIGNED__ = .;
26*91f16700Schasinglulu	. = ALIGN(8);
27*91f16700Schasinglulu#include <vendor_pubsub_events.h>
28*91f16700Schasinglulu	*(.mtk_plat_ro)
29*91f16700Schasinglulu
30*91f16700Schasinglulu#endif /* PLAT_LD_RODATA_INC */
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