1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2023, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <assert.h> 8*91f16700Schasinglulu #include <common/debug.h> 9*91f16700Schasinglulu #include <drivers/spm/mt_spm_resource_req.h> 10*91f16700Schasinglulu #include <lib/pm/mtk_pm.h> 11*91f16700Schasinglulu #include <lpm/mt_lp_api.h> 12*91f16700Schasinglulu #include <lpm/mt_lp_rm.h> 13*91f16700Schasinglulu #include <mt_spm.h> 14*91f16700Schasinglulu #include <mt_spm_cond.h> 15*91f16700Schasinglulu #include <mt_spm_conservation.h> 16*91f16700Schasinglulu #include <mt_spm_constraint.h> 17*91f16700Schasinglulu #include <mt_spm_idle.h> 18*91f16700Schasinglulu #include <mt_spm_internal.h> 19*91f16700Schasinglulu #include <mt_spm_notifier.h> 20*91f16700Schasinglulu #include "mt_spm_rc_api.h" 21*91f16700Schasinglulu #include "mt_spm_rc_internal.h" 22*91f16700Schasinglulu #include <mt_spm_reg.h> 23*91f16700Schasinglulu #include <mt_spm_suspend.h> 24*91f16700Schasinglulu 25*91f16700Schasinglulu #define CONSTRAINT_SYSPLL_ALLOW (MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF | \ 26*91f16700Schasinglulu MT_RM_CONSTRAINT_ALLOW_DRAM_S0 | \ 27*91f16700Schasinglulu MT_RM_CONSTRAINT_ALLOW_DRAM_S1 | \ 28*91f16700Schasinglulu MT_RM_CONSTRAINT_ALLOW_VCORE_LP) 29*91f16700Schasinglulu 30*91f16700Schasinglulu #define CONSTRAINT_SYSPLL_PCM_FLAG (SPM_FLAG_DISABLE_INFRA_PDN | \ 31*91f16700Schasinglulu SPM_FLAG_DISABLE_VCORE_DVS | \ 32*91f16700Schasinglulu SPM_FLAG_DISABLE_VCORE_DFS | \ 33*91f16700Schasinglulu SPM_FLAG_SRAM_SLEEP_CTRL | \ 34*91f16700Schasinglulu SPM_FLAG_KEEP_CSYSPWRACK_HIGH | \ 35*91f16700Schasinglulu SPM_FLAG_ENABLE_6315_CTRL | \ 36*91f16700Schasinglulu SPM_FLAG_DISABLE_DRAMC_MCU_SRAM_SLEEP | \ 37*91f16700Schasinglulu SPM_FLAG_USE_SRCCLKENO2) 38*91f16700Schasinglulu 39*91f16700Schasinglulu #define CONSTRAINT_SYSPLL_PCM_FLAG1 (0) 40*91f16700Schasinglulu 41*91f16700Schasinglulu /* If sspm sram won't enter sleep voltage then vcore couldn't enter low power mode */ 42*91f16700Schasinglulu #if defined(MTK_PLAT_SPM_SRAM_SLP_UNSUPPORT) && SPM_SRAM_SLEEP_RC_RES_RESTRICT 43*91f16700Schasinglulu #define CONSTRAINT_SYSPLL_RESOURCE_REQ (MT_SPM_26M) 44*91f16700Schasinglulu #else 45*91f16700Schasinglulu #define CONSTRAINT_SYSPLL_RESOURCE_REQ (MT_SPM_26M) 46*91f16700Schasinglulu #endif 47*91f16700Schasinglulu 48*91f16700Schasinglulu static unsigned int syspll_ext_opand2; 49*91f16700Schasinglulu static unsigned short ext_status_syspll; 50*91f16700Schasinglulu 51*91f16700Schasinglulu static struct mt_spm_cond_tables cond_syspll = { 52*91f16700Schasinglulu .name = "syspll", 53*91f16700Schasinglulu .table_cg = { 54*91f16700Schasinglulu 0xFF5DD002, /* MTCMOS1 */ 55*91f16700Schasinglulu 0x0000003C, /* MTCMOS2 */ 56*91f16700Schasinglulu 0x27AF8000, /* INFRA0 */ 57*91f16700Schasinglulu 0x20010876, /* INFRA1 */ 58*91f16700Schasinglulu 0x86000640, /* INFRA2 */ 59*91f16700Schasinglulu 0x30008020, /* INFRA3 */ 60*91f16700Schasinglulu 0x80000000, /* INFRA4 */ 61*91f16700Schasinglulu 0x01002A0B, /* PERI0 */ 62*91f16700Schasinglulu 0x00090000, /* VPPSYS0_0 */ 63*91f16700Schasinglulu 0x38FF3E69, /* VPPSYS0_1 */ 64*91f16700Schasinglulu 0xF0081450, /* VPPSYS1_0 */ 65*91f16700Schasinglulu 0x00003000, /* VPPSYS1_1 */ 66*91f16700Schasinglulu 0x00000000, /* VDOSYS0_0 */ 67*91f16700Schasinglulu 0x00000000, /* VDOSYS0_1 */ 68*91f16700Schasinglulu 0x000001FF, /* VDOSYS1_0 */ 69*91f16700Schasinglulu 0x008001E0, /* VDOSYS1_1 */ 70*91f16700Schasinglulu 0x00FB0007, /* VDOSYS1_2 */ 71*91f16700Schasinglulu }, 72*91f16700Schasinglulu .table_pll = 0U, 73*91f16700Schasinglulu }; 74*91f16700Schasinglulu 75*91f16700Schasinglulu static struct mt_spm_cond_tables cond_syspll_res = { 76*91f16700Schasinglulu .table_cg = { 0U }, 77*91f16700Schasinglulu .table_pll = 0U, 78*91f16700Schasinglulu }; 79*91f16700Schasinglulu 80*91f16700Schasinglulu static struct constraint_status status = { 81*91f16700Schasinglulu .id = MT_RM_CONSTRAINT_ID_SYSPLL, 82*91f16700Schasinglulu .is_valid = (MT_SPM_RC_VALID_SW | 83*91f16700Schasinglulu MT_SPM_RC_VALID_COND_CHECK | 84*91f16700Schasinglulu MT_SPM_RC_VALID_COND_LATCH | 85*91f16700Schasinglulu MT_SPM_RC_VALID_XSOC_BBLPM | 86*91f16700Schasinglulu MT_SPM_RC_VALID_TRACE_TIME), 87*91f16700Schasinglulu .is_cond_block = 0U, 88*91f16700Schasinglulu .enter_cnt = 0U, 89*91f16700Schasinglulu .cond_res = &cond_syspll_res, 90*91f16700Schasinglulu .residency = 0ULL, 91*91f16700Schasinglulu }; 92*91f16700Schasinglulu 93*91f16700Schasinglulu int spm_syspll_conduct(int state_id, struct spm_lp_scen *spm_lp, unsigned int *resource_req) 94*91f16700Schasinglulu { 95*91f16700Schasinglulu unsigned int res_req = CONSTRAINT_SYSPLL_RESOURCE_REQ; 96*91f16700Schasinglulu 97*91f16700Schasinglulu if ((spm_lp == NULL) || (resource_req == NULL)) { 98*91f16700Schasinglulu return -1; 99*91f16700Schasinglulu } 100*91f16700Schasinglulu 101*91f16700Schasinglulu spm_lp->pwrctrl->pcm_flags = (uint32_t)CONSTRAINT_SYSPLL_PCM_FLAG; 102*91f16700Schasinglulu spm_lp->pwrctrl->pcm_flags1 = (uint32_t)CONSTRAINT_SYSPLL_PCM_FLAG1; 103*91f16700Schasinglulu 104*91f16700Schasinglulu *resource_req |= res_req; 105*91f16700Schasinglulu return 0; 106*91f16700Schasinglulu } 107*91f16700Schasinglulu 108*91f16700Schasinglulu bool spm_is_valid_rc_syspll(unsigned int cpu, int state_id) 109*91f16700Schasinglulu { 110*91f16700Schasinglulu return (!(status.is_cond_block && (status.is_valid & MT_SPM_RC_VALID_COND_CHECK) > 0) && 111*91f16700Schasinglulu IS_MT_RM_RC_READY(status.is_valid) && 112*91f16700Schasinglulu (IS_PLAT_SUSPEND_ID(state_id) || 113*91f16700Schasinglulu (state_id == MT_PLAT_PWR_STATE_SYSTEM_PLL) || 114*91f16700Schasinglulu (state_id == MT_PLAT_PWR_STATE_SYSTEM_BUS))); 115*91f16700Schasinglulu } 116*91f16700Schasinglulu 117*91f16700Schasinglulu static int update_rc_condition(int state_id, const void *val) 118*91f16700Schasinglulu { 119*91f16700Schasinglulu int res = MT_RM_STATUS_OK; 120*91f16700Schasinglulu 121*91f16700Schasinglulu const struct mt_spm_cond_tables * const tlb = 122*91f16700Schasinglulu (const struct mt_spm_cond_tables * const)val; 123*91f16700Schasinglulu const struct mt_spm_cond_tables *tlb_check = 124*91f16700Schasinglulu (const struct mt_spm_cond_tables *)&cond_syspll; 125*91f16700Schasinglulu 126*91f16700Schasinglulu if (tlb == NULL) { 127*91f16700Schasinglulu return MT_RM_STATUS_BAD; 128*91f16700Schasinglulu } 129*91f16700Schasinglulu 130*91f16700Schasinglulu status.is_cond_block = mt_spm_cond_check(state_id, tlb, tlb_check, 131*91f16700Schasinglulu (status.is_valid & MT_SPM_RC_VALID_COND_LATCH) ? 132*91f16700Schasinglulu &cond_syspll_res : NULL); 133*91f16700Schasinglulu return res; 134*91f16700Schasinglulu } 135*91f16700Schasinglulu 136*91f16700Schasinglulu static void update_rc_clkbuf_status(const void *val) 137*91f16700Schasinglulu { 138*91f16700Schasinglulu unsigned int is_flight = (val) ? !!(*((unsigned int *)val) == FLIGHT_MODE_ON) : 0; 139*91f16700Schasinglulu 140*91f16700Schasinglulu if (is_flight != 0U) { 141*91f16700Schasinglulu spm_rc_constraint_valid_set(MT_RM_CONSTRAINT_ID_SYSPLL, 142*91f16700Schasinglulu MT_RM_CONSTRAINT_ID_SYSPLL, 143*91f16700Schasinglulu MT_SPM_RC_VALID_FLIGHTMODE, 144*91f16700Schasinglulu (struct constraint_status * const)&status); 145*91f16700Schasinglulu } else { 146*91f16700Schasinglulu spm_rc_constraint_valid_clr(MT_RM_CONSTRAINT_ID_SYSPLL, 147*91f16700Schasinglulu MT_RM_CONSTRAINT_ID_SYSPLL, 148*91f16700Schasinglulu MT_SPM_RC_VALID_FLIGHTMODE, 149*91f16700Schasinglulu (struct constraint_status * const)&status); 150*91f16700Schasinglulu } 151*91f16700Schasinglulu } 152*91f16700Schasinglulu 153*91f16700Schasinglulu static void update_rc_ufs_status(const void *val) 154*91f16700Schasinglulu { 155*91f16700Schasinglulu unsigned int is_ufs_h8 = (val) ? !!(*((unsigned int *)val) == UFS_REF_CLK_OFF) : 0; 156*91f16700Schasinglulu 157*91f16700Schasinglulu if (is_ufs_h8 != 0U) { 158*91f16700Schasinglulu spm_rc_constraint_valid_set(MT_RM_CONSTRAINT_ID_SYSPLL, 159*91f16700Schasinglulu MT_RM_CONSTRAINT_ID_SYSPLL, 160*91f16700Schasinglulu MT_SPM_RC_VALID_UFS_H8, 161*91f16700Schasinglulu (struct constraint_status * const)&status); 162*91f16700Schasinglulu } else { 163*91f16700Schasinglulu spm_rc_constraint_valid_clr(MT_RM_CONSTRAINT_ID_SYSPLL, 164*91f16700Schasinglulu MT_RM_CONSTRAINT_ID_SYSPLL, 165*91f16700Schasinglulu MT_SPM_RC_VALID_UFS_H8, 166*91f16700Schasinglulu (struct constraint_status * const)&status); 167*91f16700Schasinglulu } 168*91f16700Schasinglulu } 169*91f16700Schasinglulu 170*91f16700Schasinglulu static void update_rc_usb_peri(const void *val) 171*91f16700Schasinglulu { 172*91f16700Schasinglulu int *flag = (int *)val; 173*91f16700Schasinglulu 174*91f16700Schasinglulu if (flag == NULL) { 175*91f16700Schasinglulu return; 176*91f16700Schasinglulu } 177*91f16700Schasinglulu 178*91f16700Schasinglulu if (*flag != 0) { 179*91f16700Schasinglulu SPM_RC_BITS_SET(syspll_ext_opand2, MT_SPM_EX_OP_PERI_ON); 180*91f16700Schasinglulu } else { 181*91f16700Schasinglulu SPM_RC_BITS_CLR(syspll_ext_opand2, MT_SPM_EX_OP_PERI_ON); 182*91f16700Schasinglulu } 183*91f16700Schasinglulu } 184*91f16700Schasinglulu 185*91f16700Schasinglulu static void update_rc_usb_infra(const void *val) 186*91f16700Schasinglulu { 187*91f16700Schasinglulu int *flag = (int *)val; 188*91f16700Schasinglulu 189*91f16700Schasinglulu if (flag == NULL) { 190*91f16700Schasinglulu return; 191*91f16700Schasinglulu } 192*91f16700Schasinglulu 193*91f16700Schasinglulu if (*flag != 0) { 194*91f16700Schasinglulu SPM_RC_BITS_SET(syspll_ext_opand2, MT_SPM_EX_OP_INFRA_ON); 195*91f16700Schasinglulu } else { 196*91f16700Schasinglulu SPM_RC_BITS_CLR(syspll_ext_opand2, MT_SPM_EX_OP_INFRA_ON); 197*91f16700Schasinglulu } 198*91f16700Schasinglulu } 199*91f16700Schasinglulu 200*91f16700Schasinglulu static void update_rc_status(const void *val) 201*91f16700Schasinglulu { 202*91f16700Schasinglulu const struct rc_common_state *st; 203*91f16700Schasinglulu 204*91f16700Schasinglulu st = (const struct rc_common_state *)val; 205*91f16700Schasinglulu 206*91f16700Schasinglulu if (st == NULL) { 207*91f16700Schasinglulu return; 208*91f16700Schasinglulu } 209*91f16700Schasinglulu 210*91f16700Schasinglulu if (st->type == CONSTRAINT_UPDATE_COND_CHECK) { 211*91f16700Schasinglulu struct mt_spm_cond_tables * const tlb = &cond_syspll; 212*91f16700Schasinglulu 213*91f16700Schasinglulu spm_rc_condition_modifier(st->id, st->act, st->value, 214*91f16700Schasinglulu MT_RM_CONSTRAINT_ID_SYSPLL, tlb); 215*91f16700Schasinglulu } else if ((st->type == CONSTRAINT_UPDATE_VALID) || 216*91f16700Schasinglulu (st->type == CONSTRAINT_RESIDNECY)) { 217*91f16700Schasinglulu spm_rc_constraint_status_set(st->id, st->type, st->act, 218*91f16700Schasinglulu MT_RM_CONSTRAINT_ID_SYSPLL, 219*91f16700Schasinglulu (struct constraint_status * const)st->value, 220*91f16700Schasinglulu (struct constraint_status * const)&status); 221*91f16700Schasinglulu } else { 222*91f16700Schasinglulu INFO("[%s:%d] - Unknown type: 0x%x\n", __func__, __LINE__, st->type); 223*91f16700Schasinglulu } 224*91f16700Schasinglulu } 225*91f16700Schasinglulu 226*91f16700Schasinglulu int spm_update_rc_syspll(int state_id, int type, const void *val) 227*91f16700Schasinglulu { 228*91f16700Schasinglulu int res = MT_RM_STATUS_OK; 229*91f16700Schasinglulu 230*91f16700Schasinglulu switch (type) { 231*91f16700Schasinglulu case PLAT_RC_UPDATE_CONDITION: 232*91f16700Schasinglulu res = update_rc_condition(state_id, val); 233*91f16700Schasinglulu break; 234*91f16700Schasinglulu case PLAT_RC_CLKBUF_STATUS: 235*91f16700Schasinglulu update_rc_clkbuf_status(val); 236*91f16700Schasinglulu break; 237*91f16700Schasinglulu case PLAT_RC_UFS_STATUS: 238*91f16700Schasinglulu update_rc_ufs_status(val); 239*91f16700Schasinglulu break; 240*91f16700Schasinglulu case PLAT_RC_IS_USB_PERI: 241*91f16700Schasinglulu update_rc_usb_peri(val); 242*91f16700Schasinglulu break; 243*91f16700Schasinglulu case PLAT_RC_IS_USB_INFRA: 244*91f16700Schasinglulu update_rc_usb_infra(val); 245*91f16700Schasinglulu break; 246*91f16700Schasinglulu case PLAT_RC_STATUS: 247*91f16700Schasinglulu update_rc_status(val); 248*91f16700Schasinglulu break; 249*91f16700Schasinglulu default: 250*91f16700Schasinglulu INFO("[%s:%d] - Do nothing for type: %d\n", __func__, __LINE__, type); 251*91f16700Schasinglulu break; 252*91f16700Schasinglulu } 253*91f16700Schasinglulu return res; 254*91f16700Schasinglulu } 255*91f16700Schasinglulu 256*91f16700Schasinglulu unsigned int spm_allow_rc_syspll(int state_id) 257*91f16700Schasinglulu { 258*91f16700Schasinglulu return CONSTRAINT_SYSPLL_ALLOW; 259*91f16700Schasinglulu } 260*91f16700Schasinglulu 261*91f16700Schasinglulu int spm_run_rc_syspll(unsigned int cpu, int state_id) 262*91f16700Schasinglulu { 263*91f16700Schasinglulu unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT; 264*91f16700Schasinglulu unsigned int allows = CONSTRAINT_SYSPLL_ALLOW; 265*91f16700Schasinglulu 266*91f16700Schasinglulu ext_status_syspll = status.is_valid; 267*91f16700Schasinglulu 268*91f16700Schasinglulu if (IS_MT_SPM_RC_BBLPM_MODE(ext_status_syspll)) { 269*91f16700Schasinglulu #ifdef MT_SPM_USING_SRCLKEN_RC 270*91f16700Schasinglulu ext_op |= MT_SPM_EX_OP_SRCLKEN_RC_BBLPM; 271*91f16700Schasinglulu #else 272*91f16700Schasinglulu allows |= MT_RM_CONSTRAINT_ALLOW_BBLPM; 273*91f16700Schasinglulu #endif 274*91f16700Schasinglulu } 275*91f16700Schasinglulu 276*91f16700Schasinglulu #ifndef MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT 277*91f16700Schasinglulu mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_ENTER, allows | (IS_PLAT_SUSPEND_ID(state_id) ? 278*91f16700Schasinglulu MT_RM_CONSTRAINT_ALLOW_AP_SUSPEND : 0)); 279*91f16700Schasinglulu #else 280*91f16700Schasinglulu (void)allows; 281*91f16700Schasinglulu #endif 282*91f16700Schasinglulu if (ext_status_syspll & MT_SPM_RC_VALID_TRACE_TIME) { 283*91f16700Schasinglulu ext_op |= MT_SPM_EX_OP_TRACE_TIMESTAMP_EN; 284*91f16700Schasinglulu } 285*91f16700Schasinglulu 286*91f16700Schasinglulu if (IS_PLAT_SUSPEND_ID(state_id)) { 287*91f16700Schasinglulu mt_spm_suspend_enter(state_id, 288*91f16700Schasinglulu (syspll_ext_opand2 | MT_SPM_EX_OP_CLR_26M_RECORD | 289*91f16700Schasinglulu MT_SPM_EX_OP_SET_WDT | MT_SPM_EX_OP_HW_S1_DETECT | 290*91f16700Schasinglulu MT_SPM_EX_OP_SET_SUSPEND_MODE), 291*91f16700Schasinglulu CONSTRAINT_SYSPLL_RESOURCE_REQ); 292*91f16700Schasinglulu } else { 293*91f16700Schasinglulu mt_spm_idle_generic_enter(state_id, ext_op, spm_syspll_conduct); 294*91f16700Schasinglulu } 295*91f16700Schasinglulu 296*91f16700Schasinglulu return 0; 297*91f16700Schasinglulu } 298*91f16700Schasinglulu 299*91f16700Schasinglulu int spm_reset_rc_syspll(unsigned int cpu, int state_id) 300*91f16700Schasinglulu { 301*91f16700Schasinglulu unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT; 302*91f16700Schasinglulu unsigned int allows = CONSTRAINT_SYSPLL_ALLOW; 303*91f16700Schasinglulu 304*91f16700Schasinglulu if (IS_MT_SPM_RC_BBLPM_MODE(ext_status_syspll)) { 305*91f16700Schasinglulu #ifdef MT_SPM_USING_SRCLKEN_RC 306*91f16700Schasinglulu ext_op |= MT_SPM_EX_OP_SRCLKEN_RC_BBLPM; 307*91f16700Schasinglulu #else 308*91f16700Schasinglulu allows |= MT_RM_CONSTRAINT_ALLOW_BBLPM; 309*91f16700Schasinglulu #endif 310*91f16700Schasinglulu } 311*91f16700Schasinglulu 312*91f16700Schasinglulu #ifndef MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT 313*91f16700Schasinglulu mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_LEAVE, allows); 314*91f16700Schasinglulu #else 315*91f16700Schasinglulu (void)allows; 316*91f16700Schasinglulu #endif 317*91f16700Schasinglulu if (ext_status_syspll & MT_SPM_RC_VALID_TRACE_TIME) { 318*91f16700Schasinglulu ext_op |= MT_SPM_EX_OP_TRACE_TIMESTAMP_EN; 319*91f16700Schasinglulu } 320*91f16700Schasinglulu 321*91f16700Schasinglulu if (IS_PLAT_SUSPEND_ID(state_id)) { 322*91f16700Schasinglulu mt_spm_suspend_resume(state_id, 323*91f16700Schasinglulu (syspll_ext_opand2 | MT_SPM_EX_OP_SET_SUSPEND_MODE | 324*91f16700Schasinglulu MT_SPM_EX_OP_SET_WDT | MT_SPM_EX_OP_HW_S1_DETECT), 325*91f16700Schasinglulu NULL); 326*91f16700Schasinglulu } else { 327*91f16700Schasinglulu struct wake_status *waken = NULL; 328*91f16700Schasinglulu 329*91f16700Schasinglulu if (spm_unlikely(status.is_valid & MT_SPM_RC_VALID_TRACE_EVENT)) { 330*91f16700Schasinglulu ext_op |= MT_SPM_EX_OP_TRACE_LP; 331*91f16700Schasinglulu } 332*91f16700Schasinglulu 333*91f16700Schasinglulu mt_spm_idle_generic_resume(state_id, ext_op, &waken, NULL); 334*91f16700Schasinglulu status.enter_cnt++; 335*91f16700Schasinglulu 336*91f16700Schasinglulu if (spm_unlikely(status.is_valid & MT_SPM_RC_VALID_RESIDNECY)) { 337*91f16700Schasinglulu status.residency += (waken != NULL) ? waken->tr.comm.timer_out : 0; 338*91f16700Schasinglulu } 339*91f16700Schasinglulu } 340*91f16700Schasinglulu 341*91f16700Schasinglulu return 0; 342*91f16700Schasinglulu } 343*91f16700Schasinglulu 344*91f16700Schasinglulu int spm_get_status_rc_syspll(unsigned int type, void *priv) 345*91f16700Schasinglulu { 346*91f16700Schasinglulu int ret = MT_RM_STATUS_OK; 347*91f16700Schasinglulu 348*91f16700Schasinglulu if (type == PLAT_RC_STATUS) { 349*91f16700Schasinglulu int res = 0; 350*91f16700Schasinglulu struct rc_common_state *st = (struct rc_common_state *)priv; 351*91f16700Schasinglulu 352*91f16700Schasinglulu if (st == NULL) { 353*91f16700Schasinglulu return MT_RM_STATUS_BAD; 354*91f16700Schasinglulu } 355*91f16700Schasinglulu 356*91f16700Schasinglulu res = spm_rc_constraint_status_get(st->id, st->type, st->act, 357*91f16700Schasinglulu MT_RM_CONSTRAINT_ID_SYSPLL, 358*91f16700Schasinglulu (struct constraint_status * const)&status, 359*91f16700Schasinglulu (struct constraint_status * const)st->value); 360*91f16700Schasinglulu if ((res == 0) && (st->id != MT_RM_CONSTRAINT_ID_ALL)) { 361*91f16700Schasinglulu ret = MT_RM_STATUS_STOP; 362*91f16700Schasinglulu } 363*91f16700Schasinglulu } 364*91f16700Schasinglulu return ret; 365*91f16700Schasinglulu } 366