xref: /arm-trusted-firmware/plat/mediatek/drivers/spm/mt8188/constraints/mt_spm_rc_internal.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef MT_SPM_RC_INTERNAL_H
8*91f16700Schasinglulu #define MT_SPM_RC_INTERNAL_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #ifdef MTK_PLAT_SPM_SRAM_SLP_UNSUPPORT
11*91f16700Schasinglulu #define SPM_FLAG_SRAM_SLEEP_CTRL (SPM_FLAG_DISABLE_DRAMC_MCU_SRAM_SLEEP)
12*91f16700Schasinglulu #define SPM_SRAM_SLEEP_RC_RES_RESTRICT	(0)
13*91f16700Schasinglulu #else
14*91f16700Schasinglulu #define SPM_FLAG_SRAM_SLEEP_CTRL	(0)
15*91f16700Schasinglulu #define SPM_SRAM_SLEEP_RC_RES_RESTRICT	(0)
16*91f16700Schasinglulu #endif
17*91f16700Schasinglulu 
18*91f16700Schasinglulu #define SPM_RC_UPDATE_COND_ID_MASK	(0xffff)
19*91f16700Schasinglulu #define SPM_RC_UPDATE_COND_RC_ID_MASK	(0xffff)
20*91f16700Schasinglulu #define SPM_RC_UPDATE_COND_RC_ID_SHIFT	(16)
21*91f16700Schasinglulu 
22*91f16700Schasinglulu #define SPM_RC_UPDATE_COND_RC_ID_GET(val) \
23*91f16700Schasinglulu 	((val >> SPM_RC_UPDATE_COND_RC_ID_SHIFT) & SPM_RC_UPDATE_COND_RC_ID_MASK)
24*91f16700Schasinglulu 
25*91f16700Schasinglulu #define SPM_RC_UPDATE_COND_ID_GET(val) (val & SPM_RC_UPDATE_COND_ID_MASK)
26*91f16700Schasinglulu 
27*91f16700Schasinglulu /* cpu buck/ldo constraint function */
28*91f16700Schasinglulu bool spm_is_valid_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
29*91f16700Schasinglulu int spm_update_rc_cpu_buck_ldo(int state_id, int type, const void *val);
30*91f16700Schasinglulu unsigned int spm_allow_rc_cpu_buck_ldo(int state_id);
31*91f16700Schasinglulu int spm_run_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
32*91f16700Schasinglulu int spm_reset_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
33*91f16700Schasinglulu int spm_get_status_rc_cpu_buck_ldo(unsigned int type, void *priv);
34*91f16700Schasinglulu 
35*91f16700Schasinglulu /* spm resource dram constraint function */
36*91f16700Schasinglulu bool spm_is_valid_rc_dram(unsigned int cpu, int state_id);
37*91f16700Schasinglulu int spm_update_rc_dram(int state_id, int type, const void *val);
38*91f16700Schasinglulu unsigned int spm_allow_rc_dram(int state_id);
39*91f16700Schasinglulu int spm_run_rc_dram(unsigned int cpu, int state_id);
40*91f16700Schasinglulu int spm_reset_rc_dram(unsigned int cpu, int state_id);
41*91f16700Schasinglulu int spm_get_status_rc_dram(unsigned int type, void *priv);
42*91f16700Schasinglulu 
43*91f16700Schasinglulu /* spm resource syspll constraint function */
44*91f16700Schasinglulu bool spm_is_valid_rc_syspll(unsigned int cpu, int state_id);
45*91f16700Schasinglulu int spm_update_rc_syspll(int state_id, int type, const void *val);
46*91f16700Schasinglulu unsigned int spm_allow_rc_syspll(int state_id);
47*91f16700Schasinglulu int spm_run_rc_syspll(unsigned int cpu, int state_id);
48*91f16700Schasinglulu int spm_reset_rc_syspll(unsigned int cpu, int state_id);
49*91f16700Schasinglulu int spm_get_status_rc_syspll(unsigned int type, void *priv);
50*91f16700Schasinglulu 
51*91f16700Schasinglulu /* spm resource bus26m constraint function */
52*91f16700Schasinglulu bool spm_is_valid_rc_bus26m(unsigned int cpu, int state_id);
53*91f16700Schasinglulu int spm_update_rc_bus26m(int state_id, int type, const void *val);
54*91f16700Schasinglulu unsigned int spm_allow_rc_bus26m(int state_id);
55*91f16700Schasinglulu int spm_run_rc_bus26m(unsigned int cpu, int state_id);
56*91f16700Schasinglulu int spm_reset_rc_bus26m(unsigned int cpu, int state_id);
57*91f16700Schasinglulu int spm_get_status_rc_bus26m(unsigned int type, void *priv);
58*91f16700Schasinglulu 
59*91f16700Schasinglulu #endif
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