xref: /arm-trusted-firmware/plat/mediatek/drivers/ptp3/mt8188/ptp3_plat.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2022, MediaTek Inc. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef PTP3_PLAT_H
8*91f16700Schasinglulu #define PTP3_PLAT_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <lib/mmio.h>
11*91f16700Schasinglulu #include <lib/utils_def.h>
12*91f16700Schasinglulu #include <ptp3_common.h>
13*91f16700Schasinglulu 
14*91f16700Schasinglulu /* CPU Info */
15*91f16700Schasinglulu #define NR_PTP3_CFG_CPU			U(8)
16*91f16700Schasinglulu #define PTP3_CFG_CPU_START_ID_L		U(0)
17*91f16700Schasinglulu #define PTP3_CFG_CPU_START_ID_B		U(6)
18*91f16700Schasinglulu #define PTP3_CFG_CPU_END_ID		U(7)
19*91f16700Schasinglulu 
20*91f16700Schasinglulu #define NR_PTP3_CFG1_DATA		U(2)
21*91f16700Schasinglulu #define PTP3_CFG1_MASK			(0x3000)
22*91f16700Schasinglulu 
23*91f16700Schasinglulu #define NR_PTP3_CFG2_DATA		U(5)
24*91f16700Schasinglulu 
25*91f16700Schasinglulu #define PTP3_CFG3_MASK1			(0x1180)
26*91f16700Schasinglulu #define PTP3_CFG3_MASK2			(0x35C0)
27*91f16700Schasinglulu #define PTP3_CFG3_MASK3			(0x3DC0)
28*91f16700Schasinglulu 
29*91f16700Schasinglulu 
30*91f16700Schasinglulu /* Central control */
31*91f16700Schasinglulu static unsigned int ptp3_cfg1[NR_PTP3_CFG1_DATA][NR_PTP3_CFG] = {
32*91f16700Schasinglulu 	{0x0C53A2A0, 0x1000},
33*91f16700Schasinglulu 	{0x0C53A2A4, 0x1000}
34*91f16700Schasinglulu };
35*91f16700Schasinglulu 
36*91f16700Schasinglulu static unsigned int ptp3_cfg2[NR_PTP3_CFG2_DATA][NR_PTP3_CFG] = {
37*91f16700Schasinglulu 	{0x0C530404, 0x3A1000},
38*91f16700Schasinglulu 	{0x0C530428, 0x13E0408},
39*91f16700Schasinglulu 	{0x0C530434, 0xB22800},
40*91f16700Schasinglulu 	{0x0C53043C, 0x750},
41*91f16700Schasinglulu 	{0x0C530440, 0x0222c4cc}
42*91f16700Schasinglulu };
43*91f16700Schasinglulu 
44*91f16700Schasinglulu static unsigned int ptp3_cfg3[NR_PTP3_CFG] = {0x0C530400, 0xC00};
45*91f16700Schasinglulu static unsigned int ptp3_cfg3_ext[NR_PTP3_CFG] = {0x0C530400, 0xC00};
46*91f16700Schasinglulu 
47*91f16700Schasinglulu #endif /* PTP3_PLAT_H */
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