1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef MT_DP_H 8*91f16700Schasinglulu #define MT_DP_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #define DP_TX_SECURE_REG11 (0x2c) 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define VIDEO_MUTE_SEL_SECURE_FLDMASK (0x10) 13*91f16700Schasinglulu #define VIDEO_MUTE_SW_SECURE_FLDMASK (0x8) 14*91f16700Schasinglulu 15*91f16700Schasinglulu enum DP_ATF_HW_TYPE { 16*91f16700Schasinglulu DP_ATF_TYPE_DP = 0, 17*91f16700Schasinglulu DP_ATF_TYPE_EDP = 1 18*91f16700Schasinglulu }; 19*91f16700Schasinglulu 20*91f16700Schasinglulu enum DP_ATF_CMD { 21*91f16700Schasinglulu DP_ATF_DP_VIDEO_UNMUTE = 0x20, 22*91f16700Schasinglulu DP_ATF_EDP_VIDEO_UNMUTE, 23*91f16700Schasinglulu DP_ATF_CMD_COUNT 24*91f16700Schasinglulu }; 25*91f16700Schasinglulu 26*91f16700Schasinglulu int32_t dp_secure_handler(uint64_t cmd, uint64_t para, uint32_t *val); 27*91f16700Schasinglulu 28*91f16700Schasinglulu #endif 29