1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2023, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef APUSYS_SECURITY_CTRL_PLAT_H 8*91f16700Schasinglulu #define APUSYS_SECURITY_CTRL_PLAT_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <platform_def.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define SOC2APU_SET1_0 (APU_SEC_CON + 0x0c) 13*91f16700Schasinglulu #define SOC2APU_SET1_1 (APU_SEC_CON + 0x10) 14*91f16700Schasinglulu 15*91f16700Schasinglulu #define REG_DOMAIN_NUM (8) 16*91f16700Schasinglulu #define REG_DOMAIN_BITS (4) 17*91f16700Schasinglulu #define DOMAIN_REMAP_SEL BIT(6) 18*91f16700Schasinglulu 19*91f16700Schasinglulu #define D0_REMAP_DOMAIN (0) 20*91f16700Schasinglulu #define D1_REMAP_DOMAIN (1) 21*91f16700Schasinglulu #define D2_REMAP_DOMAIN (2) 22*91f16700Schasinglulu #define D3_REMAP_DOMAIN (3) 23*91f16700Schasinglulu #define D4_REMAP_DOMAIN (4) 24*91f16700Schasinglulu #define D5_REMAP_DOMAIN (14) 25*91f16700Schasinglulu #define D6_REMAP_DOMAIN (6) 26*91f16700Schasinglulu #define D7_REMAP_DOMAIN (14) 27*91f16700Schasinglulu #define D8_REMAP_DOMAIN (8) 28*91f16700Schasinglulu #define D9_REMAP_DOMAIN (9) 29*91f16700Schasinglulu #define D10_REMAP_DOMAIN (10) 30*91f16700Schasinglulu #define D11_REMAP_DOMAIN (11) 31*91f16700Schasinglulu #define D12_REMAP_DOMAIN (12) 32*91f16700Schasinglulu #define D13_REMAP_DOMAIN (13) 33*91f16700Schasinglulu #define D14_REMAP_DOMAIN (14) 34*91f16700Schasinglulu #define D15_REMAP_DOMAIN (15) 35*91f16700Schasinglulu 36*91f16700Schasinglulu void apusys_security_ctrl_init(void); 37*91f16700Schasinglulu 38*91f16700Schasinglulu #endif /* APUSYS_SECURITY_CTRL_PLAT_H */ 39