xref: /arm-trusted-firmware/plat/mediatek/drivers/apusys/mt8188/apusys_security_ctrl_plat.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu /* TF-A system header */
8*91f16700Schasinglulu #include <common/debug.h>
9*91f16700Schasinglulu #include <lib/mmio.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu /* Vendor header */
12*91f16700Schasinglulu #include "apusys_security_ctrl_plat.h"
13*91f16700Schasinglulu 
14*91f16700Schasinglulu static void apusys_domain_remap_init(void)
15*91f16700Schasinglulu {
16*91f16700Schasinglulu 	const uint32_t remap_domains[] = {
17*91f16700Schasinglulu 		D0_REMAP_DOMAIN,  D1_REMAP_DOMAIN,  D2_REMAP_DOMAIN,  D3_REMAP_DOMAIN,
18*91f16700Schasinglulu 		D4_REMAP_DOMAIN,  D5_REMAP_DOMAIN,  D6_REMAP_DOMAIN,  D7_REMAP_DOMAIN,
19*91f16700Schasinglulu 		D8_REMAP_DOMAIN,  D9_REMAP_DOMAIN,  D10_REMAP_DOMAIN, D11_REMAP_DOMAIN,
20*91f16700Schasinglulu 		D12_REMAP_DOMAIN, D13_REMAP_DOMAIN, D14_REMAP_DOMAIN, D15_REMAP_DOMAIN
21*91f16700Schasinglulu 	};
22*91f16700Schasinglulu 	uint32_t lower_domain = 0;
23*91f16700Schasinglulu 	uint32_t higher_domain = 0;
24*91f16700Schasinglulu 	int i;
25*91f16700Schasinglulu 
26*91f16700Schasinglulu 	for (i = 0; i < ARRAY_SIZE(remap_domains); i++) {
27*91f16700Schasinglulu 		if (i < REG_DOMAIN_NUM) {
28*91f16700Schasinglulu 			lower_domain |= (remap_domains[i] << (i * REG_DOMAIN_BITS));
29*91f16700Schasinglulu 		} else {
30*91f16700Schasinglulu 			higher_domain |= (remap_domains[i] <<
31*91f16700Schasinglulu 					  ((i - REG_DOMAIN_NUM) * REG_DOMAIN_BITS));
32*91f16700Schasinglulu 		}
33*91f16700Schasinglulu 	}
34*91f16700Schasinglulu 
35*91f16700Schasinglulu 	mmio_write_32(SOC2APU_SET1_0, lower_domain);
36*91f16700Schasinglulu 	mmio_write_32(SOC2APU_SET1_1, higher_domain);
37*91f16700Schasinglulu 	mmio_setbits_32(APU_SEC_CON, DOMAIN_REMAP_SEL);
38*91f16700Schasinglulu }
39*91f16700Schasinglulu 
40*91f16700Schasinglulu void apusys_security_ctrl_init(void)
41*91f16700Schasinglulu {
42*91f16700Schasinglulu 	apusys_domain_remap_init();
43*91f16700Schasinglulu }
44