1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2023, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef APUSYS_H 8*91f16700Schasinglulu #define APUSYS_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #define MODULE_TAG "[APUSYS]" 11*91f16700Schasinglulu 12*91f16700Schasinglulu enum MTK_APUSYS_KERNEL_OP { 13*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_ON, /* 0 */ 14*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_OFF, /* 1 */ 15*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_REVISER, /* 2 */ 16*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_RESET_MP, /* 3 */ 17*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_BOOT, /* 4 */ 18*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_START_MP, /* 5 */ 19*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_STOP_MP, /* 6 */ 20*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_DEVAPC_INIT_RCX, /* 7 */ 21*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_SEC_MEM, /* 8 */ 22*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_DISABLE_WDT_ISR, /* 9 */ 23*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_CLEAR_WDT_ISR, /* 10 */ 24*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_GATING, /* 11 */ 25*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_UNGATING, /* 12 */ 26*91f16700Schasinglulu MTK_APUSYS_KERNEL_OP_NUM, 27*91f16700Schasinglulu }; 28*91f16700Schasinglulu 29*91f16700Schasinglulu #endif 30