1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2022, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasinglulu# indicate the reset vector address can be programmed 8*91f16700SchasingluluPROGRAMMABLE_RESET_ADDRESS := 1 9*91f16700SchasingluluCOLD_BOOT_SINGLE_CPU := 1 10*91f16700Schasinglulu# Build flag to include AArch32 registers in cpu context save and restore during 11*91f16700Schasinglulu# world switch. This flag must be set to 0 for AArch64-only platforms. 12*91f16700SchasingluluCTX_INCLUDE_AARCH32_REGS := 0 13*91f16700SchasingluluPLAT_XLAT_TABLES_DYNAMIC := 1 14*91f16700Schasinglulu 15*91f16700SchasingluluVENDOR_EXTEND_PUBEVENT_ENABLE := 1 16