1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2022, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasinglulu# indicate the reset vector address can be programmed 8*91f16700SchasingluluPROGRAMMABLE_RESET_ADDRESS := 1 9*91f16700SchasingluluCOLD_BOOT_SINGLE_CPU := 1 10*91f16700Schasinglulu# Build flag to include AArch32 registers in cpu context save and restore during 11*91f16700Schasinglulu# world switch. This flag must be set to 0 for AArch64-only platforms. 12*91f16700SchasingluluCTX_INCLUDE_AARCH32_REGS := 0 13*91f16700SchasingluluPLAT_XLAT_TABLES_DYNAMIC := 1 14*91f16700Schasinglulu# enable this definition to print irq dump status in tf-a 15*91f16700SchasingluluGIC_DEBUG := 0 16*91f16700Schasinglulu# Enable stack protector. 17*91f16700Schasinglulu# Allowed values are "all", "strong", "default" and "none" 18*91f16700SchasingluluENABLE_STACK_PROTECTOR := strong 19*91f16700Schasinglulu# AMU, Kernel will access amuserenr_el0 if PE supported 20*91f16700Schasinglulu# Firmware _must_ implement AMU support 21*91f16700SchasingluluENABLE_FEAT_AMU := 2 22*91f16700SchasingluluVENDOR_EXTEND_PUBEVENT_ENABLE := 1 23*91f16700Schasinglulu 24*91f16700Schasinglulu# MTK define options 25*91f16700SchasingluluMTK_BL33_IS_64BIT := 0 26*91f16700SchasingluluMTK_ADAPTED := 1 27*91f16700Schasinglulu 28*91f16700Schasinglulu# MTK module config 29*91f16700SchasingluluCONFIG_MTK_INTERRUPT := y 30*91f16700SchasingluluCONFIG_MTK_UART := y 31*91f16700Schasinglulu 32*91f16700Schasinglulu# UART baudrate 33*91f16700SchasingluluUART_BAUDRATE := 921600 34