1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2022-2023, MediaTek Inc. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasinglulu# call add_defined_option to evaluate MTK defined value 8*91f16700Schasinglulu$(eval $(call add_defined_option,MTK_SIP_KERNEL_BOOT_ENABLE)) 9*91f16700Schasinglulu$(eval $(call add_defined_option,PLAT_EXTRA_RODATA_INCLUDES)) 10*91f16700Schasinglulu$(eval $(call add_defined_option,MTK_EXTRA_LINKERFILE)) 11*91f16700Schasinglulu$(eval $(call add_defined_option,MTK_BL31_AS_BL2)) 12*91f16700Schasinglulu$(eval $(call add_defined_option,MTK_BL33_IS_64BIT)) 13*91f16700Schasinglulu$(eval $(call add_defined_option,PLAT_XLAT_TABLES_DYNAMIC)) 14*91f16700Schasinglulu$(eval $(call add_defined_option,MTK_ADAPTED)) 15*91f16700Schasinglulu$(eval $(call add_defined_option,MTK_PUBEVENT_ENABLE)) 16*91f16700Schasinglulu$(eval $(call add_defined_option,MTK_SOC)) 17*91f16700Schasinglulu$(eval $(call add_defined_option,UART_CLOCK)) 18*91f16700Schasinglulu$(eval $(call add_defined_option,UART_BAUDRATE)) 19*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_MCUSYS)) 20*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_PM_SUPPORT)) 21*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_CPU_PM_SUPPORT)) 22*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_SMP_EN)) 23*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_CPU_SUSPEND_EN)) 24*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_PM_ARCH)) 25*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_CPU_PM_ARCH)) 26*91f16700Schasinglulu$(eval $(call add_defined_option,CONFIG_MTK_SUPPORT_SYSTEM_SUSPEND)) 27