1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * https://spdx.org/licenses 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <arch_helpers.h> 9*91f16700Schasinglulu #include <drivers/delay_timer.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <mvebu_def.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define SYS_COUNTER_FREQ_IN_MHZ (COUNTER_FREQUENCY/1000000) 14*91f16700Schasinglulu 15*91f16700Schasinglulu static uint32_t plat_get_timer_value(void) 16*91f16700Schasinglulu { 17*91f16700Schasinglulu /* 18*91f16700Schasinglulu * Generic delay timer implementation expects the timer to be a down 19*91f16700Schasinglulu * counter. We apply bitwise NOT operator to the tick values returned 20*91f16700Schasinglulu * by read_cntpct_el0() to simulate the down counter. 21*91f16700Schasinglulu */ 22*91f16700Schasinglulu return (uint32_t)(~read_cntpct_el0()); 23*91f16700Schasinglulu } 24*91f16700Schasinglulu 25*91f16700Schasinglulu static const timer_ops_t plat_timer_ops = { 26*91f16700Schasinglulu .get_timer_value = plat_get_timer_value, 27*91f16700Schasinglulu .clk_mult = 1, 28*91f16700Schasinglulu .clk_div = SYS_COUNTER_FREQ_IN_MHZ 29*91f16700Schasinglulu }; 30*91f16700Schasinglulu 31*91f16700Schasinglulu void plat_delay_timer_init(void) 32*91f16700Schasinglulu { 33*91f16700Schasinglulu timer_init(&plat_timer_ops); 34*91f16700Schasinglulu } 35