1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * https://spdx.org/licenses 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #ifndef MSS_IPC_DRV_H 9*91f16700Schasinglulu #define MSS_IPC_DRV_H 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <lib/psci/psci.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define MV_PM_FW_IPC_VERSION_MAGIC (0xCA530000) /* Do NOT change */ 14*91f16700Schasinglulu /* Increament for each version */ 15*91f16700Schasinglulu #define MV_PM_FW_IPC_VERSION_SEQ (0x00000001) 16*91f16700Schasinglulu #define MV_PM_FW_IPC_VERSION (MV_PM_FW_IPC_VERSION_MAGIC | \ 17*91f16700Schasinglulu MV_PM_FW_IPC_VERSION_SEQ) 18*91f16700Schasinglulu 19*91f16700Schasinglulu #define IPC_MSG_STATE_LOC (0x0) 20*91f16700Schasinglulu #define IPC_MSG_SYNC_ID_LOC (0x4) 21*91f16700Schasinglulu #define IPC_MSG_ID_LOC (0x8) 22*91f16700Schasinglulu #define IPC_MSG_RET_CH_ID_LOC (0xC) 23*91f16700Schasinglulu #define IPC_MSG_CPU_ID_LOC (0x10) 24*91f16700Schasinglulu #define IPC_MSG_CLUSTER_ID_LOC (0x14) 25*91f16700Schasinglulu #define IPC_MSG_SYSTEM_ID_LOC (0x18) 26*91f16700Schasinglulu #define IPC_MSG_POWER_STATE_LOC (0x1C) 27*91f16700Schasinglulu #define IPC_MSG_REPLY_LOC (0x20) 28*91f16700Schasinglulu #define IPC_MSG_RESERVED_LOC (0x24) 29*91f16700Schasinglulu 30*91f16700Schasinglulu /* IPC initialization state */ 31*91f16700Schasinglulu enum mss_pm_ipc_init_state { 32*91f16700Schasinglulu IPC_UN_INITIALIZED = 1, 33*91f16700Schasinglulu IPC_INITIALIZED = 2 34*91f16700Schasinglulu }; 35*91f16700Schasinglulu 36*91f16700Schasinglulu /* IPC queue direction */ 37*91f16700Schasinglulu enum mss_pm_ipc_init_msg_dir { 38*91f16700Schasinglulu IPC_MSG_TX = 0, 39*91f16700Schasinglulu IPC_MSG_RX = 1 40*91f16700Schasinglulu }; 41*91f16700Schasinglulu 42*91f16700Schasinglulu /* IPC message state */ 43*91f16700Schasinglulu enum mss_pm_ipc_msg_state { 44*91f16700Schasinglulu IPC_MSG_FREE = 1, 45*91f16700Schasinglulu IPC_MSG_OCCUPY = 2 46*91f16700Schasinglulu 47*91f16700Schasinglulu }; 48*91f16700Schasinglulu 49*91f16700Schasinglulu /* IPC control block */ 50*91f16700Schasinglulu struct mss_pm_ipc_ctrl { 51*91f16700Schasinglulu unsigned int ctrl_base_address; 52*91f16700Schasinglulu unsigned int msg_base_address; 53*91f16700Schasinglulu unsigned int num_of_channels; 54*91f16700Schasinglulu unsigned int channel_size; 55*91f16700Schasinglulu unsigned int queue_size; 56*91f16700Schasinglulu }; 57*91f16700Schasinglulu 58*91f16700Schasinglulu /* IPC message types */ 59*91f16700Schasinglulu enum mss_pm_msg_id { 60*91f16700Schasinglulu PM_IPC_MSG_CPU_SUSPEND = 1, 61*91f16700Schasinglulu PM_IPC_MSG_CPU_OFF = 2, 62*91f16700Schasinglulu PM_IPC_MSG_CPU_ON = 3, 63*91f16700Schasinglulu PM_IPC_MSG_SYSTEM_RESET = 4, 64*91f16700Schasinglulu PM_IPC_MSG_SYSTEM_SUSPEND = 5, 65*91f16700Schasinglulu PM_IPC_MAX_MSG 66*91f16700Schasinglulu }; 67*91f16700Schasinglulu 68*91f16700Schasinglulu struct mss_pm_ipc_msg { 69*91f16700Schasinglulu unsigned int msg_sync_id; /* 70*91f16700Schasinglulu * Sync number, validate message 71*91f16700Schasinglulu * reply corresponding to message 72*91f16700Schasinglulu * received 73*91f16700Schasinglulu */ 74*91f16700Schasinglulu unsigned int msg_id; /* Message Id */ 75*91f16700Schasinglulu unsigned int ret_channel_id; /* IPC channel reply */ 76*91f16700Schasinglulu unsigned int cpu_id; /* CPU Id */ 77*91f16700Schasinglulu unsigned int cluster_id; /* Cluster Id */ 78*91f16700Schasinglulu unsigned int system_id; /* System Id */ 79*91f16700Schasinglulu unsigned int power_state; 80*91f16700Schasinglulu unsigned int msg_reply; /* Message reply */ 81*91f16700Schasinglulu }; 82*91f16700Schasinglulu 83*91f16700Schasinglulu /* IPC queue */ 84*91f16700Schasinglulu struct mss_pm_ipc_queue { 85*91f16700Schasinglulu unsigned int state; 86*91f16700Schasinglulu struct mss_pm_ipc_msg msg; 87*91f16700Schasinglulu }; 88*91f16700Schasinglulu 89*91f16700Schasinglulu /* IPC channel */ 90*91f16700Schasinglulu struct mss_pm_ipc_ch { 91*91f16700Schasinglulu struct mss_pm_ipc_queue *tx_queue; 92*91f16700Schasinglulu struct mss_pm_ipc_queue *rx_queue; 93*91f16700Schasinglulu }; 94*91f16700Schasinglulu 95*91f16700Schasinglulu /***************************************************************************** 96*91f16700Schasinglulu * mv_pm_ipc_init 97*91f16700Schasinglulu * 98*91f16700Schasinglulu * DESCRIPTION: Initialize PM IPC infrastructure 99*91f16700Schasinglulu ***************************************************************************** 100*91f16700Schasinglulu */ 101*91f16700Schasinglulu int mv_pm_ipc_init(unsigned long ipc_control_addr); 102*91f16700Schasinglulu 103*91f16700Schasinglulu /***************************************************************************** 104*91f16700Schasinglulu * mv_pm_ipc_msg_rx 105*91f16700Schasinglulu * 106*91f16700Schasinglulu * DESCRIPTION: Retrieve message from IPC channel 107*91f16700Schasinglulu ***************************************************************************** 108*91f16700Schasinglulu */ 109*91f16700Schasinglulu int mv_pm_ipc_msg_rx(unsigned int channel_id, struct mss_pm_ipc_msg *msg); 110*91f16700Schasinglulu 111*91f16700Schasinglulu /***************************************************************************** 112*91f16700Schasinglulu * mv_pm_ipc_msg_tx 113*91f16700Schasinglulu * 114*91f16700Schasinglulu * DESCRIPTION: Send message via IPC channel 115*91f16700Schasinglulu ***************************************************************************** 116*91f16700Schasinglulu */ 117*91f16700Schasinglulu int mv_pm_ipc_msg_tx(unsigned int channel_id, unsigned int msg_id, 118*91f16700Schasinglulu unsigned int cluster_power_state); 119*91f16700Schasinglulu 120*91f16700Schasinglulu #endif /* MSS_IPC_DRV_H */ 121