1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * https://spdx.org/licenses 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <lib/mmio.h> 9*91f16700Schasinglulu #include <plat/common/platform.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #if MSS_SUPPORT 12*91f16700Schasinglulu #include <mss_mem.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #ifdef PM_TRACE_ENABLE 15*91f16700Schasinglulu #include <plat_pm_trace.h> 16*91f16700Schasinglulu 17*91f16700Schasinglulu /* core trace APIs */ 18*91f16700Schasinglulu core_trace_func funcTbl[PLATFORM_CORE_COUNT] = { 19*91f16700Schasinglulu pm_core_0_trace, 20*91f16700Schasinglulu pm_core_1_trace, 21*91f16700Schasinglulu pm_core_2_trace, 22*91f16700Schasinglulu pm_core_3_trace}; 23*91f16700Schasinglulu 24*91f16700Schasinglulu /***************************************************************************** 25*91f16700Schasinglulu * pm_core0_trace 26*91f16700Schasinglulu * pm_core1_trace 27*91f16700Schasinglulu * pm_core2_trace 28*91f16700Schasinglulu * pm_core_3trace 29*91f16700Schasinglulu * 30*91f16700Schasinglulu * This functions set trace info into core cyclic trace queue in MSS SRAM 31*91f16700Schasinglulu * memory space 32*91f16700Schasinglulu ***************************************************************************** 33*91f16700Schasinglulu */ 34*91f16700Schasinglulu void pm_core_0_trace(unsigned int trace) 35*91f16700Schasinglulu { 36*91f16700Schasinglulu unsigned int current_position_core_0 = 37*91f16700Schasinglulu mmio_read_32(AP_MSS_ATF_CORE_0_CTRL_BASE); 38*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_0_INFO_BASE + 39*91f16700Schasinglulu (current_position_core_0 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 40*91f16700Schasinglulu mmio_read_32(AP_MSS_TIMER_BASE)); 41*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_0_INFO_TRACE + 42*91f16700Schasinglulu (current_position_core_0 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 43*91f16700Schasinglulu trace); 44*91f16700Schasinglulu mmio_write_32(AP_MSS_ATF_CORE_0_CTRL_BASE, 45*91f16700Schasinglulu ((current_position_core_0 + 1) & 46*91f16700Schasinglulu AP_MSS_ATF_TRACE_SIZE_MASK)); 47*91f16700Schasinglulu } 48*91f16700Schasinglulu 49*91f16700Schasinglulu void pm_core_1_trace(unsigned int trace) 50*91f16700Schasinglulu { 51*91f16700Schasinglulu unsigned int current_position_core_1 = 52*91f16700Schasinglulu mmio_read_32(AP_MSS_ATF_CORE_1_CTRL_BASE); 53*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_1_INFO_BASE + 54*91f16700Schasinglulu (current_position_core_1 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 55*91f16700Schasinglulu mmio_read_32(AP_MSS_TIMER_BASE)); 56*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_1_INFO_TRACE + 57*91f16700Schasinglulu (current_position_core_1 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 58*91f16700Schasinglulu trace); 59*91f16700Schasinglulu mmio_write_32(AP_MSS_ATF_CORE_1_CTRL_BASE, 60*91f16700Schasinglulu ((current_position_core_1 + 1) & 61*91f16700Schasinglulu AP_MSS_ATF_TRACE_SIZE_MASK)); 62*91f16700Schasinglulu } 63*91f16700Schasinglulu 64*91f16700Schasinglulu void pm_core_2_trace(unsigned int trace) 65*91f16700Schasinglulu { 66*91f16700Schasinglulu unsigned int current_position_core_2 = 67*91f16700Schasinglulu mmio_read_32(AP_MSS_ATF_CORE_2_CTRL_BASE); 68*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_2_INFO_BASE + 69*91f16700Schasinglulu (current_position_core_2 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 70*91f16700Schasinglulu mmio_read_32(AP_MSS_TIMER_BASE)); 71*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_2_INFO_TRACE + 72*91f16700Schasinglulu (current_position_core_2 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 73*91f16700Schasinglulu trace); 74*91f16700Schasinglulu mmio_write_32(AP_MSS_ATF_CORE_2_CTRL_BASE, 75*91f16700Schasinglulu ((current_position_core_2 + 1) & 76*91f16700Schasinglulu AP_MSS_ATF_TRACE_SIZE_MASK)); 77*91f16700Schasinglulu } 78*91f16700Schasinglulu 79*91f16700Schasinglulu void pm_core_3_trace(unsigned int trace) 80*91f16700Schasinglulu { 81*91f16700Schasinglulu unsigned int current_position_core_3 = 82*91f16700Schasinglulu mmio_read_32(AP_MSS_ATF_CORE_3_CTRL_BASE); 83*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_3_INFO_BASE + 84*91f16700Schasinglulu (current_position_core_3 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 85*91f16700Schasinglulu mmio_read_32(AP_MSS_TIMER_BASE)); 86*91f16700Schasinglulu mmio_write_32((AP_MSS_ATF_CORE_3_INFO_TRACE + 87*91f16700Schasinglulu (current_position_core_3 * AP_MSS_ATF_CORE_ENTRY_SIZE)), 88*91f16700Schasinglulu trace); 89*91f16700Schasinglulu mmio_write_32(AP_MSS_ATF_CORE_3_CTRL_BASE, 90*91f16700Schasinglulu ((current_position_core_3 + 1) & 91*91f16700Schasinglulu AP_MSS_ATF_TRACE_SIZE_MASK)); 92*91f16700Schasinglulu } 93*91f16700Schasinglulu #endif /* PM_TRACE_ENABLE */ 94*91f16700Schasinglulu #endif /* MSS_SUPPORT */ 95