xref: /arm-trusted-firmware/plat/marvell/armada/a8k/common/ble/ble_mem.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier:     BSD-3-Clause
5*91f16700Schasinglulu * https://spdx.org/licenses
6*91f16700Schasinglulu */
7*91f16700Schasinglulu
8*91f16700Schasinglulu#include <asm_macros.S>
9*91f16700Schasinglulu#include <marvell_def.h>
10*91f16700Schasinglulu#include <platform_def.h>
11*91f16700Schasinglulu
12*91f16700Schasinglulu#define PTE_NON_EXEC_OFF	54	/* XN - eXecute Never bit offset - see VMSAv8-64 */
13*91f16700Schasinglulu
14*91f16700Schasinglulu	.globl marvell_ble_prepare_exit
15*91f16700Schasinglulu
16*91f16700Schasinglulufunc marvell_ble_prepare_exit
17*91f16700Schasinglulu	/*
18*91f16700Schasinglulu	 * Read the page table base and set the first page to be executable.
19*91f16700Schasinglulu	 * This is required for jumping to DRAM for further execution.
20*91f16700Schasinglulu	 */
21*91f16700Schasinglulu	mrs	x0, ttbr0_el3
22*91f16700Schasinglulu	ldr     x1, [x0]
23*91f16700Schasinglulu	mov	x2, #1
24*91f16700Schasinglulu	bic	x1, x1, x2, lsl #PTE_NON_EXEC_OFF
25*91f16700Schasinglulu	str	x1, [x0]
26*91f16700Schasinglulu	tlbi	alle3
27*91f16700Schasinglulu	dsb	sy
28*91f16700Schasinglulu	isb
29*91f16700Schasinglulu	ret
30*91f16700Schasingluluendfunc marvell_ble_prepare_exit
31