xref: /arm-trusted-firmware/plat/marvell/armada/a8k/common/ble/ble.ld.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier:     BSD-3-Clause
5*91f16700Schasinglulu * https://spdx.org/licenses
6*91f16700Schasinglulu */
7*91f16700Schasinglulu
8*91f16700Schasinglulu#include <platform_def.h>
9*91f16700Schasinglulu
10*91f16700SchasingluluOUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
11*91f16700SchasingluluOUTPUT_ARCH(PLATFORM_LINKER_ARCH)
12*91f16700SchasingluluENTRY(ble_main)
13*91f16700Schasinglulu
14*91f16700SchasingluluMEMORY {
15*91f16700Schasinglulu    RAM (rwx): ORIGIN = BLE_BASE, LENGTH = BLE_LIMIT - BLE_BASE
16*91f16700Schasinglulu}
17*91f16700Schasinglulu
18*91f16700SchasingluluSECTIONS
19*91f16700Schasinglulu{
20*91f16700Schasinglulu    . = BLE_BASE;
21*91f16700Schasinglulu
22*91f16700Schasinglulu    .ro . : {
23*91f16700Schasinglulu        __RO_START__ = .;
24*91f16700Schasinglulu        *ble_main.o(.entry*)
25*91f16700Schasinglulu        *(.text*)
26*91f16700Schasinglulu        *(.rodata*)
27*91f16700Schasinglulu        __RO_END_UNALIGNED__ = .;
28*91f16700Schasinglulu        __RO_END__ = .;
29*91f16700Schasinglulu    } >RAM
30*91f16700Schasinglulu
31*91f16700Schasinglulu    /*
32*91f16700Schasinglulu     * Define a linker symbol to mark start of the RW memory area for this
33*91f16700Schasinglulu     * image.
34*91f16700Schasinglulu     */
35*91f16700Schasinglulu    __RW_START__ = . ;
36*91f16700Schasinglulu
37*91f16700Schasinglulu    .data . : {
38*91f16700Schasinglulu        __DATA_START__ = .;
39*91f16700Schasinglulu        *(.data*)
40*91f16700Schasinglulu        __DATA_END__ = .;
41*91f16700Schasinglulu    } >RAM
42*91f16700Schasinglulu
43*91f16700Schasinglulu    .stacks . (NOLOAD) : {
44*91f16700Schasinglulu        __STACKS_START__ = .;
45*91f16700Schasinglulu        *(.tzfw_normal_stacks)
46*91f16700Schasinglulu        __STACKS_END__ = .;
47*91f16700Schasinglulu    } >RAM
48*91f16700Schasinglulu
49*91f16700Schasinglulu    .bss : {
50*91f16700Schasinglulu        __BSS_START__ = .;
51*91f16700Schasinglulu        *(.bss*)
52*91f16700Schasinglulu        __BSS_END__ = .;
53*91f16700Schasinglulu    } >RAM
54*91f16700Schasinglulu
55*91f16700Schasinglulu   /*
56*91f16700Schasinglulu    * Extend the BLE binary to the maximum size allocated for it in platform
57*91f16700Schasinglulu    * definition files and prevent overlapping between BLE BSS section and
58*91f16700Schasinglulu    * additional extensions that can follow the BLE in flash image preamble.
59*91f16700Schasinglulu    * This situation happens for instance when secure extension is added to
60*91f16700Schasinglulu    * the image preamble.
61*91f16700Schasinglulu    */
62*91f16700Schasinglulu   .fill LOADADDR(.bss) + SIZEOF(.bss) : {
63*91f16700Schasinglulu       FILL(0xDEADC0DE);
64*91f16700Schasinglulu       . = ORIGIN(RAM) + LENGTH(RAM) - 1;
65*91f16700Schasinglulu       BYTE(0x00)
66*91f16700Schasinglulu   } >RAM
67*91f16700Schasinglulu
68*91f16700Schasinglulu    /*
69*91f16700Schasinglulu     * Define a linker symbol to mark end of the RW memory area for this
70*91f16700Schasinglulu     * image.
71*91f16700Schasinglulu     */
72*91f16700Schasinglulu    __RW_END__ = .;
73*91f16700Schasinglulu    __BLE_END__ = .;
74*91f16700Schasinglulu
75*91f16700Schasinglulu    __BSS_SIZE__ = SIZEOF(.bss);
76*91f16700Schasinglulu}
77