xref: /arm-trusted-firmware/plat/marvell/armada/a8k/a70x0_amc/mvebu_def.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (C) 2018 Marvell International Ltd.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier:     BSD-3-Clause
5*91f16700Schasinglulu  * https://spdx.org/licenses
6*91f16700Schasinglulu  */
7*91f16700Schasinglulu 
8*91f16700Schasinglulu #ifndef MVEBU_DEF_H
9*91f16700Schasinglulu #define MVEBU_DEF_H
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <a8k_plat_def.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu #define CP_COUNT		1	/* A70x0 has single CP0 */
14*91f16700Schasinglulu 
15*91f16700Schasinglulu /***********************************************************************
16*91f16700Schasinglulu  * Required platform porting definitions common to all
17*91f16700Schasinglulu  * Management Compute SubSystems (MSS)
18*91f16700Schasinglulu  ***********************************************************************
19*91f16700Schasinglulu  */
20*91f16700Schasinglulu /*
21*91f16700Schasinglulu  * Load address of SCP_BL2
22*91f16700Schasinglulu  * SCP_BL2 is loaded to the same place as BL31.
23*91f16700Schasinglulu  * Once SCP_BL2 is transferred to the SCP,
24*91f16700Schasinglulu  * it is discarded and BL31 is loaded over the top.
25*91f16700Schasinglulu  */
26*91f16700Schasinglulu #ifdef SCP_IMAGE
27*91f16700Schasinglulu #define SCP_BL2_BASE		BL31_BASE
28*91f16700Schasinglulu #endif
29*91f16700Schasinglulu 
30*91f16700Schasinglulu 
31*91f16700Schasinglulu #endif /* MVEBU_DEF_H */
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