xref: /arm-trusted-firmware/plat/marvell/armada/a3k/common/include/plat_macros.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier:	BSD-3-Clause
5*91f16700Schasinglulu * https://spdx.org/licenses
6*91f16700Schasinglulu */
7*91f16700Schasinglulu
8*91f16700Schasinglulu#ifndef PLAT_MACROS_S
9*91f16700Schasinglulu#define PLAT_MACROS_S
10*91f16700Schasinglulu
11*91f16700Schasinglulu#include <marvell_macros.S>
12*91f16700Schasinglulu
13*91f16700Schasinglulu/* ---------------------------------------------
14*91f16700Schasinglulu * The below macro prints out relevant GIC and
15*91f16700Schasinglulu * CCI registers registers whenever an unhandled
16*91f16700Schasinglulu * exception is taken in BL31.
17*91f16700Schasinglulu * ---------------------------------------------
18*91f16700Schasinglulu */
19*91f16700Schasinglulu.macro plat_crash_print_regs
20*91f16700Schasinglulu	mov_imm	x17, MVEBU_GICC_BASE
21*91f16700Schasinglulu	mov_imm	x16, MVEBU_GICD_BASE
22*91f16700Schasinglulu	marvell_print_gic_regs
23*91f16700Schasinglulu	print_cci_regs
24*91f16700Schasinglulu.endm
25*91f16700Schasinglulu
26*91f16700Schasinglulu#endif /* PLAT_MACROS_S */
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