xref: /arm-trusted-firmware/plat/marvell/armada/a3k/common/aarch64/plat_helpers.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier:	BSD-3-Clause
5*91f16700Schasinglulu * https://spdx.org/licenses
6*91f16700Schasinglulu */
7*91f16700Schasinglulu
8*91f16700Schasinglulu#include <asm_macros.S>
9*91f16700Schasinglulu#include <platform_def.h>
10*91f16700Schasinglulu
11*91f16700Schasinglulu	.globl	plat_secondary_cold_boot_setup
12*91f16700Schasinglulu	.globl	plat_get_my_entrypoint
13*91f16700Schasinglulu	.globl	plat_is_my_cpu_primary
14*91f16700Schasinglulu
15*91f16700Schasinglulu	/* -----------------------------------------------------
16*91f16700Schasinglulu	 * void plat_secondary_cold_boot_setup (void);
17*91f16700Schasinglulu	 *
18*91f16700Schasinglulu	 * This function performs any platform specific actions
19*91f16700Schasinglulu	 * needed for a secondary cpu after a cold reset. Right
20*91f16700Schasinglulu	 * now this is a stub function.
21*91f16700Schasinglulu	 * -----------------------------------------------------
22*91f16700Schasinglulu	 */
23*91f16700Schasinglulufunc plat_secondary_cold_boot_setup
24*91f16700Schasinglulu	mov	x0, #0
25*91f16700Schasinglulu	ret
26*91f16700Schasingluluendfunc plat_secondary_cold_boot_setup
27*91f16700Schasinglulu
28*91f16700Schasinglulu	/* ---------------------------------------------------------------------
29*91f16700Schasinglulu	 * unsigned long plat_get_my_entrypoint (void);
30*91f16700Schasinglulu	 *
31*91f16700Schasinglulu	 * Main job of this routine is to distinguish between cold and warm boot
32*91f16700Schasinglulu	 * For a cold boot, return 0.
33*91f16700Schasinglulu	 * For a warm boot, read the mailbox and return the address it contains.
34*91f16700Schasinglulu	 * A magic number is placed before entrypoint to avoid mistake caused by
35*91f16700Schasinglulu	 * uninitialized mailbox data area.
36*91f16700Schasinglulu	 * ---------------------------------------------------------------------
37*91f16700Schasinglulu	 */
38*91f16700Schasinglulufunc plat_get_my_entrypoint
39*91f16700Schasinglulu	/* Read first word and compare it with magic num */
40*91f16700Schasinglulu	mov_imm x0, PLAT_MARVELL_MAILBOX_BASE
41*91f16700Schasinglulu	ldr	x1, [x0]
42*91f16700Schasinglulu	mov_imm x2, PLAT_MARVELL_MAILBOX_MAGIC_NUM
43*91f16700Schasinglulu	cmp	x1, x2
44*91f16700Schasinglulu	/* If compare failed, return 0, i.e. cold boot */
45*91f16700Schasinglulu	beq	entrypoint
46*91f16700Schasinglulu	mov	x0, #0
47*91f16700Schasinglulu	ret
48*91f16700Schasingluluentrypoint:
49*91f16700Schasinglulu	/* Second word contains the jump address */
50*91f16700Schasinglulu	add	x0, x0, #8
51*91f16700Schasinglulu	ldr	x0, [x0]
52*91f16700Schasinglulu	ret
53*91f16700Schasingluluendfunc plat_get_my_entrypoint
54*91f16700Schasinglulu
55*91f16700Schasinglulu	/* -----------------------------------------------------
56*91f16700Schasinglulu	 * unsigned int plat_is_my_cpu_primary (void);
57*91f16700Schasinglulu	 *
58*91f16700Schasinglulu	 * Find out whether the current cpu is the primary
59*91f16700Schasinglulu	 * cpu.
60*91f16700Schasinglulu	 * -----------------------------------------------------
61*91f16700Schasinglulu	 */
62*91f16700Schasinglulufunc plat_is_my_cpu_primary
63*91f16700Schasinglulu	mrs	x0, mpidr_el1
64*91f16700Schasinglulu	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
65*91f16700Schasinglulu	cmp	x0, #MVEBU_PRIMARY_CPU
66*91f16700Schasinglulu	cset	w0, eq
67*91f16700Schasinglulu	ret
68*91f16700Schasingluluendfunc plat_is_my_cpu_primary
69