1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * https://spdx.org/licenses 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <a3700_pm.h> 9*91f16700Schasinglulu #include <plat_marvell.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu /* This struct provides the PM wake up src configuration for A3720 Development Board */ 12*91f16700Schasinglulu static struct pm_wake_up_src_config wake_up_src_cfg = { 13*91f16700Schasinglulu .wake_up_src_num = 3, 14*91f16700Schasinglulu .wake_up_src[0] = { 15*91f16700Schasinglulu .wake_up_src_type = WAKE_UP_SRC_GPIO, 16*91f16700Schasinglulu .wake_up_data = { 17*91f16700Schasinglulu .gpio_data.bank_num = 0, /* North Bridge */ 18*91f16700Schasinglulu .gpio_data.gpio_num = 14 19*91f16700Schasinglulu } 20*91f16700Schasinglulu }, 21*91f16700Schasinglulu .wake_up_src[1] = { 22*91f16700Schasinglulu .wake_up_src_type = WAKE_UP_SRC_GPIO, 23*91f16700Schasinglulu .wake_up_data = { 24*91f16700Schasinglulu .gpio_data.bank_num = 1, /* South Bridge */ 25*91f16700Schasinglulu .gpio_data.gpio_num = 2 26*91f16700Schasinglulu } 27*91f16700Schasinglulu }, 28*91f16700Schasinglulu .wake_up_src[2] = { 29*91f16700Schasinglulu .wake_up_src_type = WAKE_UP_SRC_UART1, 30*91f16700Schasinglulu } 31*91f16700Schasinglulu }; 32*91f16700Schasinglulu 33*91f16700Schasinglulu struct pm_wake_up_src_config *mv_wake_up_src_config_get(void) 34*91f16700Schasinglulu { 35*91f16700Schasinglulu return &wake_up_src_cfg; 36*91f16700Schasinglulu } 37*91f16700Schasinglulu 38