1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright 2022-2023 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <assert.h> 8*91f16700Schasinglulu #include <errno.h> 9*91f16700Schasinglulu #include <stdbool.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <common/bl_common.h> 12*91f16700Schasinglulu #include <common/debug.h> 13*91f16700Schasinglulu #include <lib/mmio.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu #include "trdc_config.h" 16*91f16700Schasinglulu 17*91f16700Schasinglulu struct trdc_mgr_info trdc_mgr_blks[] = { 18*91f16700Schasinglulu { TRDC_A_BASE, 0, 0, 39, 40 }, 19*91f16700Schasinglulu { TRDC_W_BASE, 0, 0, 70, 71 }, 20*91f16700Schasinglulu { TRDC_M_BASE, 1, 0, 1, 2 }, 21*91f16700Schasinglulu { TRDC_N_BASE, 0, 1, 1, 2 }, 22*91f16700Schasinglulu }; 23*91f16700Schasinglulu 24*91f16700Schasinglulu unsigned int trdc_mgr_num = ARRAY_SIZE(trdc_mgr_blks); 25*91f16700Schasinglulu 26*91f16700Schasinglulu struct trdc_config_info trdc_cfg_info[] = { 27*91f16700Schasinglulu { TRDC_A_BASE, 28*91f16700Schasinglulu trdc_a_mbc_glbac, ARRAY_SIZE(trdc_a_mbc_glbac), 29*91f16700Schasinglulu trdc_a_mbc, ARRAY_SIZE(trdc_a_mbc), 30*91f16700Schasinglulu trdc_a_mrc_glbac, ARRAY_SIZE(trdc_a_mrc_glbac), 31*91f16700Schasinglulu trdc_a_mrc, ARRAY_SIZE(trdc_a_mrc) 32*91f16700Schasinglulu }, /* TRDC_A */ 33*91f16700Schasinglulu { TRDC_W_BASE, 34*91f16700Schasinglulu trdc_w_mbc_glbac, ARRAY_SIZE(trdc_w_mbc_glbac), 35*91f16700Schasinglulu trdc_w_mbc, ARRAY_SIZE(trdc_w_mbc), 36*91f16700Schasinglulu trdc_w_mrc_glbac, ARRAY_SIZE(trdc_w_mrc_glbac), 37*91f16700Schasinglulu trdc_w_mrc, ARRAY_SIZE(trdc_w_mrc) 38*91f16700Schasinglulu }, /* TRDC_W */ 39*91f16700Schasinglulu { TRDC_N_BASE, 40*91f16700Schasinglulu trdc_n_mbc_glbac, ARRAY_SIZE(trdc_n_mbc_glbac), 41*91f16700Schasinglulu trdc_n_mbc, ARRAY_SIZE(trdc_n_mbc), 42*91f16700Schasinglulu trdc_n_mrc_glbac, ARRAY_SIZE(trdc_n_mrc_glbac), 43*91f16700Schasinglulu trdc_n_mrc, ARRAY_SIZE(trdc_n_mrc) 44*91f16700Schasinglulu }, /* TRDC_N */ 45*91f16700Schasinglulu }; 46*91f16700Schasinglulu 47*91f16700Schasinglulu void trdc_config(void) 48*91f16700Schasinglulu { 49*91f16700Schasinglulu unsigned int i; 50*91f16700Schasinglulu 51*91f16700Schasinglulu /* Set MTR to DID1 */ 52*91f16700Schasinglulu trdc_mda_set_noncpu(TRDC_A_BASE, 4, false, 0x2, 0x2, 0x1); 53*91f16700Schasinglulu 54*91f16700Schasinglulu /* Set M33 to DID2*/ 55*91f16700Schasinglulu trdc_mda_set_cpu(TRDC_A_BASE, 1, 0, 0x2, 0x0, 0x2, 0x0, 0x0, 0x0); 56*91f16700Schasinglulu 57*91f16700Schasinglulu /* Configure the access permission for TRDC MGR and MC slots */ 58*91f16700Schasinglulu for (i = 0U; i < ARRAY_SIZE(trdc_mgr_blks); i++) { 59*91f16700Schasinglulu trdc_mgr_mbc_setup(&trdc_mgr_blks[i]); 60*91f16700Schasinglulu } 61*91f16700Schasinglulu 62*91f16700Schasinglulu /* Configure TRDC user settings from config table */ 63*91f16700Schasinglulu for (i = 0U; i < ARRAY_SIZE(trdc_cfg_info); i++) { 64*91f16700Schasinglulu trdc_setup(&trdc_cfg_info[i]); 65*91f16700Schasinglulu } 66*91f16700Schasinglulu 67*91f16700Schasinglulu NOTICE("TRDC init done\n"); 68*91f16700Schasinglulu } 69