xref: /arm-trusted-firmware/plat/imx/imx8m/include/imx8m_caam.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2019, NXP. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef IMX8M_CAAM_H
8*91f16700Schasinglulu #define IMX8M_CAAM_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <lib/utils_def.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #include <platform_def.h>
13*91f16700Schasinglulu 
14*91f16700Schasinglulu #define CAAM_JR0MID		(IMX_CAAM_BASE + 0x10)
15*91f16700Schasinglulu #define CAAM_JR1MID		(IMX_CAAM_BASE + 0x18)
16*91f16700Schasinglulu #define CAAM_JR2MID		(IMX_CAAM_BASE + 0x20)
17*91f16700Schasinglulu #define CAAM_NS_MID		(0x1)
18*91f16700Schasinglulu 
19*91f16700Schasinglulu #define JR0_BASE		(IMX_CAAM_BASE + 0x1000)
20*91f16700Schasinglulu 
21*91f16700Schasinglulu #define SM_P0_PERM		(JR0_BASE + 0xa04)
22*91f16700Schasinglulu #define SM_P0_SMAG2		(JR0_BASE + 0xa08)
23*91f16700Schasinglulu #define SM_P0_SMAG1		(JR0_BASE + 0xa0c)
24*91f16700Schasinglulu #define SM_CMD			(JR0_BASE + 0xbe4)
25*91f16700Schasinglulu 
26*91f16700Schasinglulu /* secure memory command */
27*91f16700Schasinglulu #define SMC_PAGE_SHIFT		16
28*91f16700Schasinglulu #define SMC_PART_SHIFT		8
29*91f16700Schasinglulu 
30*91f16700Schasinglulu #define SMC_CMD_ALLOC_PAGE	0x01	/* allocate page to this partition */
31*91f16700Schasinglulu #define SMC_CMD_DEALLOC_PART	0x03	/* deallocate partition */
32*91f16700Schasinglulu 
33*91f16700Schasinglulu void imx8m_caam_init(void);
34*91f16700Schasinglulu 
35*91f16700Schasinglulu #endif /* IMX8M_CAAM_H */
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