xref: /arm-trusted-firmware/plat/imx/imx8m/imx_rdc.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2019, NXP. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <lib/mmio.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <imx_rdc.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu void imx_rdc_init(const struct imx_rdc_cfg *rdc_cfg)
12*91f16700Schasinglulu {
13*91f16700Schasinglulu 	const struct imx_rdc_cfg *rdc = rdc_cfg;
14*91f16700Schasinglulu 
15*91f16700Schasinglulu 	while (rdc->type != RDC_INVALID) {
16*91f16700Schasinglulu 		switch (rdc->type) {
17*91f16700Schasinglulu 		case RDC_MDA:
18*91f16700Schasinglulu 			/* MDA config */
19*91f16700Schasinglulu 			mmio_write_32(MDAn(rdc->index), rdc->setting.rdc_mda);
20*91f16700Schasinglulu 			break;
21*91f16700Schasinglulu 		case RDC_PDAP:
22*91f16700Schasinglulu 			/* peripheral access permission config */
23*91f16700Schasinglulu 			mmio_write_32(PDAPn(rdc->index), rdc->setting.rdc_pdap);
24*91f16700Schasinglulu 			break;
25*91f16700Schasinglulu 		case RDC_MEM_REGION:
26*91f16700Schasinglulu 			/* memory region access permission config */
27*91f16700Schasinglulu 			mmio_write_32(MRSAn(rdc->index), rdc->setting.rdc_mem_region[0]);
28*91f16700Schasinglulu 			mmio_write_32(MREAn(rdc->index), rdc->setting.rdc_mem_region[1]);
29*91f16700Schasinglulu 			mmio_write_32(MRCn(rdc->index), rdc->setting.rdc_mem_region[2]);
30*91f16700Schasinglulu 			break;
31*91f16700Schasinglulu 		default:
32*91f16700Schasinglulu 			break;
33*91f16700Schasinglulu 		}
34*91f16700Schasinglulu 
35*91f16700Schasinglulu 		rdc++;
36*91f16700Schasinglulu 	}
37*91f16700Schasinglulu }
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