xref: /arm-trusted-firmware/plat/imx/imx8m/imx_aipstz.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2019, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <lib/mmio.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <imx_aipstz.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu void imx_aipstz_init(const struct aipstz_cfg *aipstz_cfg)
12*91f16700Schasinglulu {
13*91f16700Schasinglulu 	const struct aipstz_cfg *aipstz = aipstz_cfg;
14*91f16700Schasinglulu 
15*91f16700Schasinglulu 	while (aipstz->base != 0U) {
16*91f16700Schasinglulu 		mmio_write_32(aipstz->base + AIPSTZ_MPR0, aipstz->mpr0);
17*91f16700Schasinglulu 		mmio_write_32(aipstz->base + AIPSTZ_MPR1, aipstz->mpr1);
18*91f16700Schasinglulu 
19*91f16700Schasinglulu 		for (int i = 0; i < AIPSTZ_OPACR_NUM; i++)
20*91f16700Schasinglulu 			mmio_write_32(aipstz->base + OPACR_OFFSET(i), aipstz->opacr[i]);
21*91f16700Schasinglulu 
22*91f16700Schasinglulu 		aipstz++;
23*91f16700Schasinglulu 	}
24*91f16700Schasinglulu }
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