1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2018-2023, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasinglulu# Translation tables library 8*91f16700Schasingluluinclude lib/xlat_tables_v2/xlat_tables.mk 9*91f16700Schasinglulu 10*91f16700SchasingluluPLAT_INCLUDES := -Iplat/imx/common/include \ 11*91f16700Schasinglulu -Iplat/imx/imx8m/include \ 12*91f16700Schasinglulu -Iplat/imx/imx8m/imx8mq/include 13*91f16700Schasinglulu 14*91f16700Schasinglulu# Include GICv3 driver files 15*91f16700Schasingluluinclude drivers/arm/gic/v3/gicv3.mk 16*91f16700Schasinglulu 17*91f16700SchasingluluIMX_DRAM_SOURCES := plat/imx/imx8m/ddr/dram.c \ 18*91f16700Schasinglulu plat/imx/imx8m/ddr/clock.c \ 19*91f16700Schasinglulu plat/imx/imx8m/ddr/dram_retention.c \ 20*91f16700Schasinglulu plat/imx/imx8m/ddr/ddr4_dvfs.c \ 21*91f16700Schasinglulu plat/imx/imx8m/ddr/lpddr4_dvfs.c 22*91f16700Schasinglulu 23*91f16700SchasingluluIMX_GIC_SOURCES := ${GICV3_SOURCES} \ 24*91f16700Schasinglulu plat/common/plat_gicv3.c \ 25*91f16700Schasinglulu plat/common/plat_psci_common.c \ 26*91f16700Schasinglulu plat/imx/common/plat_imx8_gic.c 27*91f16700Schasinglulu 28*91f16700SchasingluluBL31_SOURCES += plat/imx/common/imx8_helpers.S \ 29*91f16700Schasinglulu plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c \ 30*91f16700Schasinglulu plat/imx/imx8m/imx8mq/imx8mq_psci.c \ 31*91f16700Schasinglulu plat/imx/imx8m/gpc_common.c \ 32*91f16700Schasinglulu plat/imx/imx8m/imx_aipstz.c \ 33*91f16700Schasinglulu plat/imx/imx8m/imx8m_caam.c \ 34*91f16700Schasinglulu plat/imx/imx8m/imx8m_psci_common.c \ 35*91f16700Schasinglulu plat/imx/imx8m/imx8mq/gpc.c \ 36*91f16700Schasinglulu plat/imx/common/imx8_topology.c \ 37*91f16700Schasinglulu plat/imx/common/imx_sip_handler.c \ 38*91f16700Schasinglulu plat/imx/common/imx_sip_svc.c \ 39*91f16700Schasinglulu plat/imx/common/imx_uart_console.S \ 40*91f16700Schasinglulu lib/cpus/aarch64/cortex_a53.S \ 41*91f16700Schasinglulu drivers/arm/tzc/tzc380.c \ 42*91f16700Schasinglulu drivers/delay_timer/delay_timer.c \ 43*91f16700Schasinglulu drivers/delay_timer/generic_delay_timer.c \ 44*91f16700Schasinglulu ${XLAT_TABLES_LIB_SRCS} \ 45*91f16700Schasinglulu ${IMX_DRAM_SOURCES} \ 46*91f16700Schasinglulu ${IMX_GIC_SOURCES} 47*91f16700Schasinglulu 48*91f16700SchasingluluENABLE_PIE := 1 49*91f16700SchasingluluUSE_COHERENT_MEM := 1 50*91f16700SchasingluluRESET_TO_BL31 := 1 51*91f16700SchasingluluA53_DISABLE_NON_TEMPORAL_HINT := 0 52*91f16700SchasingluluWARMBOOT_ENABLE_DCACHE_EARLY := 1 53*91f16700Schasinglulu 54*91f16700SchasingluluERRATA_A53_835769 := 1 55*91f16700SchasingluluERRATA_A53_843419 := 1 56*91f16700SchasingluluERRATA_A53_855873 := 1 57*91f16700Schasinglulu 58*91f16700SchasingluluBL32_BASE ?= 0xfe000000 59*91f16700Schasinglulu$(eval $(call add_define,BL32_BASE)) 60*91f16700Schasinglulu 61*91f16700SchasingluluBL32_SIZE ?= 0x2000000 62*91f16700Schasinglulu$(eval $(call add_define,BL32_SIZE)) 63*91f16700Schasinglulu 64*91f16700SchasingluluIMX_BOOT_UART_BASE ?= 0x30860000 65*91f16700Schasinglulu$(eval $(call add_define,IMX_BOOT_UART_BASE)) 66*91f16700Schasinglulu 67*91f16700Schasingluluifeq (${SPD},trusty) 68*91f16700Schasinglulu BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 69*91f16700Schasingluluendif 70