1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <stdbool.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <arch.h> 10*91f16700Schasinglulu #include <arch_helpers.h> 11*91f16700Schasinglulu #include <common/debug.h> 12*91f16700Schasinglulu #include <lib/mmio.h> 13*91f16700Schasinglulu #include <lib/psci/psci.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu #include <gpc.h> 16*91f16700Schasinglulu #include <imx8m_psci.h> 17*91f16700Schasinglulu #include <plat_imx8.h> 18*91f16700Schasinglulu 19*91f16700Schasinglulu static const plat_psci_ops_t imx_plat_psci_ops = { 20*91f16700Schasinglulu .pwr_domain_on = imx_pwr_domain_on, 21*91f16700Schasinglulu .pwr_domain_on_finish = imx_pwr_domain_on_finish, 22*91f16700Schasinglulu .pwr_domain_off = imx_pwr_domain_off, 23*91f16700Schasinglulu .validate_ns_entrypoint = imx_validate_ns_entrypoint, 24*91f16700Schasinglulu .validate_power_state = imx_validate_power_state, 25*91f16700Schasinglulu .cpu_standby = imx_cpu_standby, 26*91f16700Schasinglulu .pwr_domain_suspend = imx_domain_suspend, 27*91f16700Schasinglulu .pwr_domain_suspend_finish = imx_domain_suspend_finish, 28*91f16700Schasinglulu .pwr_domain_pwr_down_wfi = imx_pwr_domain_pwr_down_wfi, 29*91f16700Schasinglulu .get_sys_suspend_power_state = imx_get_sys_suspend_power_state, 30*91f16700Schasinglulu .system_reset = imx_system_reset, 31*91f16700Schasinglulu .system_reset2 = imx_system_reset2, 32*91f16700Schasinglulu .system_off = imx_system_off, 33*91f16700Schasinglulu }; 34*91f16700Schasinglulu 35*91f16700Schasinglulu /* export the platform specific psci ops */ 36*91f16700Schasinglulu int plat_setup_psci_ops(uintptr_t sec_entrypoint, 37*91f16700Schasinglulu const plat_psci_ops_t **psci_ops) 38*91f16700Schasinglulu { 39*91f16700Schasinglulu /* sec_entrypoint is used for warm reset */ 40*91f16700Schasinglulu imx_mailbox_init(sec_entrypoint); 41*91f16700Schasinglulu 42*91f16700Schasinglulu *psci_ops = &imx_plat_psci_ops; 43*91f16700Schasinglulu 44*91f16700Schasinglulu return 0; 45*91f16700Schasinglulu } 46