1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019-2022 NXP. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <common/debug.h> 8*91f16700Schasinglulu #include <lib/mmio.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <imx8m_caam.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define HAB_JR0_DID U(0x8011) 13*91f16700Schasinglulu 14*91f16700Schasinglulu void imx8m_caam_init(void) 15*91f16700Schasinglulu { 16*91f16700Schasinglulu uint32_t sm_cmd; 17*91f16700Schasinglulu 18*91f16700Schasinglulu /* Dealloc part 0 and 2 with current DID */ 19*91f16700Schasinglulu sm_cmd = (0 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART); 20*91f16700Schasinglulu mmio_write_32(SM_CMD, sm_cmd); 21*91f16700Schasinglulu 22*91f16700Schasinglulu sm_cmd = (2 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART); 23*91f16700Schasinglulu mmio_write_32(SM_CMD, sm_cmd); 24*91f16700Schasinglulu 25*91f16700Schasinglulu /* config CAAM JRaMID set MID to Cortex A */ 26*91f16700Schasinglulu if (mmio_read_32(CAAM_JR0MID) == HAB_JR0_DID) { 27*91f16700Schasinglulu NOTICE("Do not release JR0 to NS as it can be used by HAB\n"); 28*91f16700Schasinglulu } else { 29*91f16700Schasinglulu mmio_write_32(CAAM_JR0MID, CAAM_NS_MID); 30*91f16700Schasinglulu } 31*91f16700Schasinglulu 32*91f16700Schasinglulu mmio_write_32(CAAM_JR1MID, CAAM_NS_MID); 33*91f16700Schasinglulu mmio_write_32(CAAM_JR2MID, CAAM_NS_MID); 34*91f16700Schasinglulu 35*91f16700Schasinglulu /* Alloc partition 0 writing SMPO and SMAGs */ 36*91f16700Schasinglulu mmio_write_32(SM_P0_PERM, 0xff); 37*91f16700Schasinglulu mmio_write_32(SM_P0_SMAG2, 0xffffffff); 38*91f16700Schasinglulu mmio_write_32(SM_P0_SMAG1, 0xffffffff); 39*91f16700Schasinglulu 40*91f16700Schasinglulu /* Allocate page 0 and 1 to partition 0 with DID set */ 41*91f16700Schasinglulu sm_cmd = (0 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT | 42*91f16700Schasinglulu SMC_CMD_ALLOC_PAGE); 43*91f16700Schasinglulu mmio_write_32(SM_CMD, sm_cmd); 44*91f16700Schasinglulu 45*91f16700Schasinglulu sm_cmd = (1 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT | 46*91f16700Schasinglulu SMC_CMD_ALLOC_PAGE); 47*91f16700Schasinglulu mmio_write_32(SM_CMD, sm_cmd); 48*91f16700Schasinglulu } 49