1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2018-2023, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasinglulu# Include imx7 common 8*91f16700Schasingluluinclude plat/imx/imx7/common/imx7.mk 9*91f16700Schasinglulu 10*91f16700Schasinglulu# Platform 11*91f16700SchasingluluPLAT_INCLUDES += -Iplat/imx/imx7/picopi/include \ 12*91f16700Schasinglulu 13*91f16700SchasingluluBL2_SOURCES += drivers/imx/usdhc/imx_usdhc.c \ 14*91f16700Schasinglulu plat/imx/imx7/picopi/picopi_bl2_el3_setup.c \ 15*91f16700Schasinglulu 16*91f16700Schasinglulu# Build config flags 17*91f16700Schasinglulu# ------------------ 18*91f16700Schasinglulu 19*91f16700SchasingluluARM_CORTEX_A7 := yes 20*91f16700SchasingluluWORKAROUND_CVE_2017_5715 := 0 21*91f16700Schasinglulu 22*91f16700SchasingluluRESET_TO_BL31 := 0 23*91f16700Schasinglulu 24*91f16700Schasinglulu# Non-TF Boot ROM 25*91f16700SchasingluluRESET_TO_BL2 := 1 26*91f16700Schasinglulu 27*91f16700Schasinglulu# Indicate single-core 28*91f16700SchasingluluCOLD_BOOT_SINGLE_CPU := 1 29*91f16700Schasinglulu 30*91f16700Schasinglulu# Have different sections for code and rodata 31*91f16700SchasingluluSEPARATE_CODE_AND_RODATA := 1 32*91f16700Schasinglulu 33*91f16700Schasinglulu# Use Coherent memory 34*91f16700SchasingluluUSE_COHERENT_MEM := 1 35*91f16700Schasinglulu 36*91f16700Schasinglulu# Use multi console API 37*91f16700Schasinglulu 38*91f16700SchasingluluPLAT_PICOPI_UART :=5 39*91f16700Schasinglulu$(eval $(call add_define,PLAT_PICOPI_UART)) 40