1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <common/bl_common.h> 10*91f16700Schasinglulu #include <common/desc_image_load.h> 11*91f16700Schasinglulu #include <plat/common/platform.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu static bl_mem_params_node_t bl2_mem_params_descs[] = { 14*91f16700Schasinglulu { 15*91f16700Schasinglulu .image_id = BL32_IMAGE_ID, 16*91f16700Schasinglulu 17*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2, 18*91f16700Schasinglulu entry_point_info_t, 19*91f16700Schasinglulu SECURE | EXECUTABLE | EP_FIRST_EXE), 20*91f16700Schasinglulu .ep_info.pc = BL32_BASE, 21*91f16700Schasinglulu 22*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2, 23*91f16700Schasinglulu image_info_t, 0), 24*91f16700Schasinglulu 25*91f16700Schasinglulu .image_info.image_base = IMX7_OPTEE_BASE, 26*91f16700Schasinglulu .image_info.image_max_size = IMX7_OPTEE_SIZE, 27*91f16700Schasinglulu 28*91f16700Schasinglulu .next_handoff_image_id = BL33_IMAGE_ID, 29*91f16700Schasinglulu }, 30*91f16700Schasinglulu { 31*91f16700Schasinglulu .image_id = BL32_EXTRA1_IMAGE_ID, 32*91f16700Schasinglulu 33*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2, 34*91f16700Schasinglulu entry_point_info_t, 35*91f16700Schasinglulu SECURE | NON_EXECUTABLE), 36*91f16700Schasinglulu 37*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2, 38*91f16700Schasinglulu image_info_t, IMAGE_ATTRIB_SKIP_LOADING), 39*91f16700Schasinglulu .image_info.image_base = IMX7_OPTEE_BASE, 40*91f16700Schasinglulu .image_info.image_max_size = IMX7_OPTEE_SIZE, 41*91f16700Schasinglulu 42*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 43*91f16700Schasinglulu }, 44*91f16700Schasinglulu { 45*91f16700Schasinglulu /* This is a zero sized image so we don't set base or size */ 46*91f16700Schasinglulu .image_id = BL32_EXTRA2_IMAGE_ID, 47*91f16700Schasinglulu 48*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 49*91f16700Schasinglulu VERSION_2, entry_point_info_t, 50*91f16700Schasinglulu SECURE | NON_EXECUTABLE), 51*91f16700Schasinglulu 52*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 53*91f16700Schasinglulu VERSION_2, image_info_t, 54*91f16700Schasinglulu IMAGE_ATTRIB_SKIP_LOADING), 55*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 56*91f16700Schasinglulu }, 57*91f16700Schasinglulu { 58*91f16700Schasinglulu .image_id = BL33_IMAGE_ID, 59*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2, 60*91f16700Schasinglulu entry_point_info_t, 61*91f16700Schasinglulu NON_SECURE | EXECUTABLE), 62*91f16700Schasinglulu # ifdef PRELOADED_BL33_BASE 63*91f16700Schasinglulu .ep_info.pc = PRELOADED_BL33_BASE, 64*91f16700Schasinglulu 65*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 66*91f16700Schasinglulu VERSION_2, image_info_t, 67*91f16700Schasinglulu IMAGE_ATTRIB_SKIP_LOADING), 68*91f16700Schasinglulu # else 69*91f16700Schasinglulu .ep_info.pc = BL33_BASE, 70*91f16700Schasinglulu 71*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 72*91f16700Schasinglulu VERSION_2, image_info_t, 0), 73*91f16700Schasinglulu .image_info.image_base = IMX7_UBOOT_BASE, 74*91f16700Schasinglulu .image_info.image_max_size = IMX7_UBOOT_SIZE, 75*91f16700Schasinglulu # endif /* PRELOADED_BL33_BASE */ 76*91f16700Schasinglulu 77*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 78*91f16700Schasinglulu } 79*91f16700Schasinglulu }; 80*91f16700Schasinglulu 81*91f16700Schasinglulu REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs); 82