1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <arch.h> 8*91f16700Schasinglulu#include <asm_macros.S> 9*91f16700Schasinglulu#include <console_macros.S> 10*91f16700Schasinglulu#include <assert_macros.S> 11*91f16700Schasinglulu#include "imx8_lpuart.h" 12*91f16700Schasinglulu 13*91f16700Schasinglulu .globl console_lpuart_register 14*91f16700Schasinglulu .globl console_lpuart_init 15*91f16700Schasinglulu .globl console_lpuart_putc 16*91f16700Schasinglulu .globl console_lpuart_getc 17*91f16700Schasinglulu .globl console_lpuart_flush 18*91f16700Schasinglulu 19*91f16700Schasinglulufunc console_lpuart_register 20*91f16700Schasinglulu mov x7, x30 21*91f16700Schasinglulu mov x6, x3 22*91f16700Schasinglulu cbz x6, register_fail 23*91f16700Schasinglulu str x0, [x6, #CONSOLE_T_BASE] 24*91f16700Schasinglulu 25*91f16700Schasinglulu bl console_lpuart_init 26*91f16700Schasinglulu cbz x0, register_fail 27*91f16700Schasinglulu 28*91f16700Schasinglulu mov x0, x6 29*91f16700Schasinglulu mov x30, x7 30*91f16700Schasinglulu finish_console_register lpuart putc=1, getc=ENABLE_CONSOLE_GETC, flush=1 31*91f16700Schasinglulu 32*91f16700Schasingluluregister_fail: 33*91f16700Schasinglulu ret x7 34*91f16700Schasingluluendfunc console_lpuart_register 35*91f16700Schasinglulu 36*91f16700Schasinglulufunc console_lpuart_init 37*91f16700Schasinglulu mov w0, #1 38*91f16700Schasinglulu ret 39*91f16700Schasingluluendfunc console_lpuart_init 40*91f16700Schasinglulu 41*91f16700Schasinglulufunc console_lpuart_putc 42*91f16700Schasinglulu ldr x1, [x1, #CONSOLE_T_BASE] 43*91f16700Schasinglulu cbz x1, putc_error 44*91f16700Schasinglulu /* Prepare '\r' to '\n' */ 45*91f16700Schasinglulu cmp w0, #0xA 46*91f16700Schasinglulu b.ne 2f 47*91f16700Schasinglulu1: 48*91f16700Schasinglulu /* Check if the transmit FIFO is full */ 49*91f16700Schasinglulu ldr w2, [x1, #STAT] 50*91f16700Schasinglulu tbz w2, #23, 1b 51*91f16700Schasinglulu mov w2, #0xD 52*91f16700Schasinglulu str w2, [x1, #DATA] 53*91f16700Schasinglulu2: 54*91f16700Schasinglulu /* Check if the transmit FIFO is full */ 55*91f16700Schasinglulu ldr w2, [x1, #STAT] 56*91f16700Schasinglulu tbz w2, #23, 2b 57*91f16700Schasinglulu str w0, [x1, #DATA] 58*91f16700Schasinglulu ret 59*91f16700Schasingluluputc_error: 60*91f16700Schasinglulu mov w0, #-1 61*91f16700Schasinglulu ret 62*91f16700Schasingluluendfunc console_lpuart_putc 63*91f16700Schasinglulu 64*91f16700Schasinglulufunc console_lpuart_getc 65*91f16700Schasinglulu ldr x0, [x0, #CONSOLE_T_BASE] 66*91f16700Schasinglulu cbz x0, getc_error 67*91f16700Schasinglulu /* Check if the receive FIFO state */ 68*91f16700Schasinglulu ret 69*91f16700Schasinglulugetc_error: 70*91f16700Schasinglulu mov w0, #-1 71*91f16700Schasinglulu ret 72*91f16700Schasingluluendfunc console_lpuart_getc 73*91f16700Schasinglulu 74*91f16700Schasinglulufunc console_lpuart_flush 75*91f16700Schasinglulu ret 76*91f16700Schasingluluendfunc console_lpuart_flush 77