xref: /arm-trusted-firmware/plat/imx/common/include/plat_imx8.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef PLAT_IMX8_H
8*91f16700Schasinglulu #define PLAT_IMX8_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <drivers/arm/gicv3.h>
11*91f16700Schasinglulu #include <lib/psci/psci.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu struct plat_gic_ctx {
14*91f16700Schasinglulu 	gicv3_redist_ctx_t rdist_ctx[PLATFORM_CORE_COUNT];
15*91f16700Schasinglulu 	gicv3_dist_ctx_t dist_ctx;
16*91f16700Schasinglulu };
17*91f16700Schasinglulu 
18*91f16700Schasinglulu unsigned int plat_calc_core_pos(uint64_t mpidr);
19*91f16700Schasinglulu void imx_mailbox_init(uintptr_t base_addr);
20*91f16700Schasinglulu void plat_gic_driver_init(void);
21*91f16700Schasinglulu void plat_gic_init(void);
22*91f16700Schasinglulu void plat_gic_cpuif_enable(void);
23*91f16700Schasinglulu void plat_gic_cpuif_disable(void);
24*91f16700Schasinglulu void plat_gic_pcpu_init(void);
25*91f16700Schasinglulu 
26*91f16700Schasinglulu void __dead2 imx_system_off(void);
27*91f16700Schasinglulu void __dead2 imx_system_reset(void);
28*91f16700Schasinglulu int imx_validate_power_state(unsigned int power_state,
29*91f16700Schasinglulu 			psci_power_state_t *req_state);
30*91f16700Schasinglulu void imx_get_sys_suspend_power_state(psci_power_state_t *req_state);
31*91f16700Schasinglulu bool imx_is_wakeup_src_irqsteer(void);
32*91f16700Schasinglulu void plat_gic_save(unsigned int proc_num, struct plat_gic_ctx *ctx);
33*91f16700Schasinglulu void plat_gic_restore(unsigned int proc_num, struct plat_gic_ctx *ctx);
34*91f16700Schasinglulu 
35*91f16700Schasinglulu #endif /* PLAT_IMX8_H */
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