1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu #ifndef IMX_CSU_H 7*91f16700Schasinglulu #define IMX_CSU_H 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <arch.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu /* 12*91f16700Schasinglulu * Security Reference Manual for i.MX 7Dual and 7Solo Applications Processors, 13*91f16700Schasinglulu * Rev. 0, 03/2017 Section 3.3.1 14*91f16700Schasinglulu * 15*91f16700Schasinglulu * Config secure level register (CSU_CSLn) 16*91f16700Schasinglulu */ 17*91f16700Schasinglulu #define CSU_CSL_LOCK_S1 BIT(24) 18*91f16700Schasinglulu #define CSU_CSL_NSW_S1 BIT(23) 19*91f16700Schasinglulu #define CSU_CSL_NUW_S1 BIT(22) 20*91f16700Schasinglulu #define CSU_CSL_SSW_S1 BIT(21) 21*91f16700Schasinglulu #define CSU_CSL_SUW_S1 BIT(20) 22*91f16700Schasinglulu #define CSU_CSL_NSR_S1 BIT(19) 23*91f16700Schasinglulu #define CSU_CSL_NUR_S1 BIT(18) 24*91f16700Schasinglulu #define CSU_CSL_SSR_S1 BIT(17) 25*91f16700Schasinglulu #define CSU_CSL_SUR_S1 BIT(16) 26*91f16700Schasinglulu #define CSU_CSL_LOCK_S2 BIT(8) 27*91f16700Schasinglulu #define CSU_CSL_NSW_S2 BIT(7) 28*91f16700Schasinglulu #define CSU_CSL_NUW_S2 BIT(6) 29*91f16700Schasinglulu #define CSU_CSL_SSW_S2 BIT(5) 30*91f16700Schasinglulu #define CSU_CSL_SUW_S2 BIT(4) 31*91f16700Schasinglulu #define CSU_CSL_NSR_S2 BIT(3) 32*91f16700Schasinglulu #define CSU_CSL_NUR_S2 BIT(2) 33*91f16700Schasinglulu #define CSU_CSL_SSR_S2 BIT(1) 34*91f16700Schasinglulu #define CSU_CSL_SUR_S2 BIT(0) 35*91f16700Schasinglulu 36*91f16700Schasinglulu #define CSU_CSL_OPEN_ACCESS (CSU_CSL_NSW_S1 | CSU_CSL_NUW_S1 | CSU_CSL_SSW_S1 |\ 37*91f16700Schasinglulu CSU_CSL_SUW_S1 | CSU_CSL_NSR_S1 | CSU_CSL_NUR_S1 |\ 38*91f16700Schasinglulu CSU_CSL_SSR_S1 | CSU_CSL_SUR_S1 | CSU_CSL_NSW_S2 |\ 39*91f16700Schasinglulu CSU_CSL_NUW_S2 | CSU_CSL_SSW_S2 | CSU_CSL_SUW_S2 |\ 40*91f16700Schasinglulu CSU_CSL_NSR_S2 | CSU_CSL_NUR_S2 | CSU_CSL_SSR_S2 |\ 41*91f16700Schasinglulu CSU_CSL_SUR_S2) 42*91f16700Schasinglulu void imx_csu_init(void); 43*91f16700Schasinglulu 44*91f16700Schasinglulu #endif /* IMX_CSU_H */ 45