1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef IMX_CAAM_H 8*91f16700Schasinglulu #define IMX_CAAM_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <cdefs.h> 11*91f16700Schasinglulu #include <stdint.h> 12*91f16700Schasinglulu #include <arch.h> 13*91f16700Schasinglulu #include <imx_regs.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu struct caam_job_ring { 16*91f16700Schasinglulu uint32_t jrmidr_ms; 17*91f16700Schasinglulu uint32_t jrmidr_ls; 18*91f16700Schasinglulu }; 19*91f16700Schasinglulu 20*91f16700Schasinglulu struct caam_rtic_mid { 21*91f16700Schasinglulu uint32_t rticmidr_ms; 22*91f16700Schasinglulu uint32_t rticmidr_ls; 23*91f16700Schasinglulu }; 24*91f16700Schasinglulu 25*91f16700Schasinglulu struct caam_deco { 26*91f16700Schasinglulu uint32_t deco_mid_ms; 27*91f16700Schasinglulu uint32_t deco_mid_ls; 28*91f16700Schasinglulu }; 29*91f16700Schasinglulu 30*91f16700Schasinglulu #define JOB_RING_OFFSET 0x10 31*91f16700Schasinglulu #define DEBUGCTL_OFFSET 0x58 32*91f16700Schasinglulu #define RES2_SIZE (DEBUGCTL_OFFSET - JOB_RING_OFFSET - \ 33*91f16700Schasinglulu (sizeof(struct caam_job_ring) * CAAM_NUM_JOB_RINGS)) 34*91f16700Schasinglulu 35*91f16700Schasinglulu #define RTIC_MID_OFFSET 0x60 36*91f16700Schasinglulu #define DECORR_OFFSET 0x9C 37*91f16700Schasinglulu #define RES3_SIZE (DECORR_OFFSET - RTIC_MID_OFFSET - \ 38*91f16700Schasinglulu (sizeof(struct caam_rtic_mid) * CAAM_NUM_RTIC)) 39*91f16700Schasinglulu 40*91f16700Schasinglulu #define DECO_MID_OFFSET 0xA0 41*91f16700Schasinglulu #define DAR_OFFSET 0x120 42*91f16700Schasinglulu #define RES4_SIZE (DAR_OFFSET - DECO_MID_OFFSET - \ 43*91f16700Schasinglulu (sizeof(struct caam_deco) * CAAM_NUM_DECO)) 44*91f16700Schasinglulu 45*91f16700Schasinglulu struct caam_ctrl { 46*91f16700Schasinglulu uint32_t res0; 47*91f16700Schasinglulu uint32_t mcfgr; 48*91f16700Schasinglulu uint32_t res1; 49*91f16700Schasinglulu uint32_t scfgr; 50*91f16700Schasinglulu struct caam_job_ring jr[CAAM_NUM_JOB_RINGS]; 51*91f16700Schasinglulu uint8_t res2[RES2_SIZE]; 52*91f16700Schasinglulu uint32_t debuctl; 53*91f16700Schasinglulu uint32_t jrstartr; 54*91f16700Schasinglulu struct caam_rtic_mid mid[CAAM_NUM_RTIC]; 55*91f16700Schasinglulu uint8_t res3[RES3_SIZE]; 56*91f16700Schasinglulu uint32_t decorr; 57*91f16700Schasinglulu struct caam_deco deco[CAAM_NUM_DECO]; 58*91f16700Schasinglulu uint8_t res4[RES4_SIZE]; 59*91f16700Schasinglulu uint32_t dar; 60*91f16700Schasinglulu uint32_t drr; 61*91f16700Schasinglulu } __packed; 62*91f16700Schasinglulu 63*91f16700Schasinglulu /* Job ring control bits */ 64*91f16700Schasinglulu #define JROWN_NS BIT(3) 65*91f16700Schasinglulu #define JROWN_MID 0x01 66*91f16700Schasinglulu 67*91f16700Schasinglulu /* Declare CAAM API */ 68*91f16700Schasinglulu void imx_caam_init(void); 69*91f16700Schasinglulu 70*91f16700Schasinglulu #endif /* IMX_CAAM_H */ 71